From 7935b4a89b5bf9118b2d3a3fc7a1dbde6dc7af23 Mon Sep 17 00:00:00 2001 From: Mario Scheithauer Date: Tue, 2 Apr 2019 08:49:37 +0200 Subject: siemens/mc_apl5: Remove reduced clock rate for I2C0 There is no device on I2C0 which requires a lower clock rate. Change-Id: Iaf01be5ea4839c54eb2f0ba95bca272970c24bdb Signed-off-by: Mario Scheithauer Reviewed-on: https://review.coreboot.org/c/coreboot/+/32139 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel Reviewed-by: Uwe Poeche Reviewed-by: Werner Zeh --- src/mainboard/siemens/mc_apl1/variants/mc_apl5/devicetree.cb | 12 ------------ 1 file changed, 12 deletions(-) (limited to 'src') diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl5/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl5/devicetree.cb index 989ab45699..15be7ffc53 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl5/devicetree.cb +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl5/devicetree.cb @@ -49,18 +49,6 @@ chip soc/intel/apollolake # Enable Vtd feature register "enable_vtd" = "1" - # Intel Common SoC Config - #+-------------------+---------------------------+ - #| Field | Value | - #+-------------------+---------------------------+ - #| I2C0 | Proximity Sensor | - #+-------------------+---------------------------+ - register "common_soc_config" = "{ - .i2c[0] = { - .speed = I2C_SPEED_STANDARD - }, - }" - device domain 0 on device pci 00.0 on end # - Host Bridge device pci 00.1 off end # - DPTF -- cgit v1.2.3