From 892b091e967cd2a54e23d22c8b37bfe12ebaaab5 Mon Sep 17 00:00:00 2001 From: Patrick Georgi Date: Thu, 24 Sep 2009 09:03:06 +0000 Subject: Make all Kconfig enabled boards build (tested with kbuildall). Also enable building individual boards with kbuildall for debugging. Signed-off-by: Patrick Georgi Acked-by: Stefan Reinauer git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4666 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/Kconfig | 8 +++ src/cpu/Kconfig | 1 + src/cpu/via/Kconfig | 1 + src/mainboard/Kconfig | 2 + src/mainboard/asus/mew-vm/Kconfig | 7 +- src/mainboard/compaq/deskpro_en_sff_p600/Kconfig | 3 +- src/mainboard/emulation/Kconfig | 20 +----- src/mainboard/emulation/qemu-x86/Kconfig | 19 ++++++ src/mainboard/mitac/6513wu/devicetree.cb | 87 ++++++++++++++++++++++++ src/mainboard/soyo/sy-6ba-plus-iii/devicetree.cb | 73 ++++++++++++++++++++ src/mainboard/via/epia-n/Kconfig | 4 ++ src/mainboard/via/vt8454c/Kconfig | 10 +++ src/northbridge/via/cn400/Kconfig | 5 ++ src/superio/smsc/lpc47b272/Makefile.inc | 2 +- 14 files changed, 220 insertions(+), 22 deletions(-) create mode 100644 src/mainboard/emulation/qemu-x86/Kconfig create mode 100644 src/mainboard/mitac/6513wu/devicetree.cb create mode 100644 src/mainboard/soyo/sy-6ba-plus-iii/devicetree.cb (limited to 'src') diff --git a/src/Kconfig b/src/Kconfig index d44fa40381..9f8862366a 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -44,6 +44,14 @@ config PCI_BUS_SEGN_BITS bool default n +config HT_CHAIN_UNITID_BASE + hex + default 0x1 + +config HT_CHAIN_END_UNITID_BASE + hex + default 0x20 + config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID hex default 0 diff --git a/src/cpu/Kconfig b/src/cpu/Kconfig index b9ce5a893c..e70f021217 100644 --- a/src/cpu/Kconfig +++ b/src/cpu/Kconfig @@ -20,6 +20,7 @@ config DCACHE_RAM_SIZE config SMP bool default y if MAX_CPUS != 1 + default n config CPU_SOCKET_TYPE hex diff --git a/src/cpu/via/Kconfig b/src/cpu/via/Kconfig index 6927f6d0e1..006fb8b456 100644 --- a/src/cpu/via/Kconfig +++ b/src/cpu/via/Kconfig @@ -1 +1,2 @@ +source src/cpu/via/model_c3/Kconfig source src/cpu/via/model_c7/Kconfig diff --git a/src/mainboard/Kconfig b/src/mainboard/Kconfig index ca3a58e202..88de40421b 100644 --- a/src/mainboard/Kconfig +++ b/src/mainboard/Kconfig @@ -374,6 +374,7 @@ source "src/mainboard/iwill/Kconfig" source "src/mainboard/jetway/Kconfig" source "src/mainboard/kontron/Kconfig" source "src/mainboard/lippert/Kconfig" +source "src/mainboard/mitac/Kconfig" source "src/mainboard/motorola/Kconfig" source "src/mainboard/msi/Kconfig" source "src/mainboard/nec/Kconfig" @@ -382,6 +383,7 @@ source "src/mainboard/nvidia/Kconfig" source "src/mainboard/olpc/Kconfig" source "src/mainboard/pcengines/Kconfig" source "src/mainboard/rca/Kconfig" +source "src/mainboard/soyo/Kconfig" source "src/mainboard/sunw/Kconfig" source "src/mainboard/supermicro/Kconfig" source "src/mainboard/technexion/Kconfig" diff --git a/src/mainboard/asus/mew-vm/Kconfig b/src/mainboard/asus/mew-vm/Kconfig index 992cae9bdb..67e61ba78c 100644 --- a/src/mainboard/asus/mew-vm/Kconfig +++ b/src/mainboard/asus/mew-vm/Kconfig @@ -24,7 +24,7 @@ config BOARD_ASUS_MEW_VM select CPU_INTEL_SOCKET_PGA370 select NORTHBRIDGE_INTEL_I82810 select SOUTHBRIDGE_INTEL_I82801XX - select SUPERIO_SMSC_SMSCSUPERIO + select SUPERIO_SMSC_LPC47B272 select HAVE_PIRQ_TABLE select UDELAY_IO select PCI_ROM_RUN @@ -42,6 +42,11 @@ config MAINBOARD_PART_NUMBER default "MEW-VM" depends on BOARD_ASUS_MEW_VM +config HAVE_OPTION_TABLE + bool + default n + depends on BOARD_ASUS_MEW_VM + config IRQ_SLOT_COUNT int default 11 diff --git a/src/mainboard/compaq/deskpro_en_sff_p600/Kconfig b/src/mainboard/compaq/deskpro_en_sff_p600/Kconfig index c71ae404bb..1073cba8be 100644 --- a/src/mainboard/compaq/deskpro_en_sff_p600/Kconfig +++ b/src/mainboard/compaq/deskpro_en_sff_p600/Kconfig @@ -24,7 +24,8 @@ config BOARD_COMPAQ_DESKPRO_EN_SFF_P600 select CPU_INTEL_SLOT_2 select NORTHBRIDGE_INTEL_I440BX select SOUTHBRIDGE_INTEL_I82371EB - select SUPERIO_NSC_PC97307 + # should be SUPERIO_NSC_PC97307! + select SUPERIO_NSC_PC97317 select HAVE_PIRQ_TABLE select UDELAY_IO select PCI_ROM_RUN diff --git a/src/mainboard/emulation/Kconfig b/src/mainboard/emulation/Kconfig index 023adffee6..c2ecc2b2b9 100644 --- a/src/mainboard/emulation/Kconfig +++ b/src/mainboard/emulation/Kconfig @@ -2,24 +2,6 @@ choice prompt "Mainboard model" depends on VENDOR_EMULATION -config BOARD_EMULATION_QEMU_X86 - bool "QEMU x86" - select ARCH_X86 - select CPU_I586 - select SOUTHBRIDGE_INTEL_I82371EB - select CPU_EMULATION_QEMU_X86 - select CONSOLE_SERIAL8250 - help - x86 QEMU variant. +source "src/mainboard/emulation/qemu-x86/Kconfig" endchoice - -config MAINBOARD_DIR - string - default emulation/qemu-x86 - depends on BOARD_EMULATION_QEMU_X86 - -config MAINBOARD_PART_NUMBER - string - default "QEMU-86" - depends on BOARD_EMULATION_QEMU_X86 diff --git a/src/mainboard/emulation/qemu-x86/Kconfig b/src/mainboard/emulation/qemu-x86/Kconfig new file mode 100644 index 0000000000..8649bd8050 --- /dev/null +++ b/src/mainboard/emulation/qemu-x86/Kconfig @@ -0,0 +1,19 @@ +config BOARD_EMULATION_QEMU_X86 + bool "QEMU x86" + select ARCH_X86 + select CPU_I586 + select SOUTHBRIDGE_INTEL_I82371EB + select CPU_EMULATION_QEMU_X86 + select CONSOLE_SERIAL8250 + help + x86 QEMU variant. + +config MAINBOARD_DIR + string + default emulation/qemu-x86 + depends on BOARD_EMULATION_QEMU_X86 + +config MAINBOARD_PART_NUMBER + string + default "QEMU-86" + depends on BOARD_EMULATION_QEMU_X86 diff --git a/src/mainboard/mitac/6513wu/devicetree.cb b/src/mainboard/mitac/6513wu/devicetree.cb new file mode 100644 index 0000000000..0731b2f2cd --- /dev/null +++ b/src/mainboard/mitac/6513wu/devicetree.cb @@ -0,0 +1,87 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2009 Michael Gold +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + +chip northbridge/intel/i82810 # Northbridge + device apic_cluster 0 on # APIC cluster + chip cpu/intel/socket_PGA370 # CPU + device apic 0 on end # APIC + end + end + device pci_domain 0 on # PCI domain + device pci 0.0 on end # Graphics Memory Controller Hub (GMCH) + chip drivers/pci/onboard + device pci 1.0 on end + register "rom_address" = "0xfff80000" # 512 KB image + end + chip southbridge/intel/i82801xx # Southbridge + register "pirqa_routing" = "0x03" + register "pirqb_routing" = "0x05" + register "pirqc_routing" = "0x09" + register "pirqd_routing" = "0x0b" + + register "ide0_enable" = "1" + register "ide1_enable" = "1" + + device pci 1e.0 on # PCI bridge + device pci 5.0 on end # Audio controller (ESS ES1988) + end + device pci 1f.0 on # ISA bridge + chip superio/smsc/smscsuperio # Super I/O (SMSC LPC47U332) + device pnp 4e.0 on # Floppy + io 0x60 = 0x3f0 + irq 0x70 = 6 + drq 0x74 = 2 + end + device pnp 4e.3 on # Parallel port + io 0x60 = 0x378 + irq 0x70 = 7 + drq 0x74 = 3 + end + device pnp 4e.4 on # COM1 + io 0x60 = 0x3f8 + irq 0x70 = 4 + end + device pnp 4e.5 on # MIDI port (MPU-401) + io 0x60 = 0x330 + irq 0x70 = 10 + end + device pnp 4e.7 on # PS/2 keyboard / mouse + io 0x60 = 0x60 # XXX: not relocatable + io 0x62 = 0x64 # XXX: not relocatable + irq 0x70 = 1 # PS/2 keyboard interrupt + irq 0x72 = 12 # PS/2 mouse interrupt + end + device pnp 4e.9 on # Game port + io 0x60 = 0x201 + end + device pnp 4e.a on # Runtime registers + io 0x60 = 0x400 + end + device pnp 4e.b off end # SMBus + end + end + device pci 1f.1 on end # IDE + device pci 1f.2 on end # USB + device pci 1f.3 on end # SMbus + device pci 1f.5 off end # Audio controller + device pci 1f.6 off end # Modem + end + end +end diff --git a/src/mainboard/soyo/sy-6ba-plus-iii/devicetree.cb b/src/mainboard/soyo/sy-6ba-plus-iii/devicetree.cb new file mode 100644 index 0000000000..b51ebe6f81 --- /dev/null +++ b/src/mainboard/soyo/sy-6ba-plus-iii/devicetree.cb @@ -0,0 +1,73 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2009 Uwe Hermann +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + +chip northbridge/intel/i440bx # Northbridge + device apic_cluster 0 on # APIC cluster + chip cpu/intel/slot_2 # CPU (FIXME: It's slot 1, actually) + device apic 0 on end # APIC + end + end + device pci_domain 0 on # PCI domain + device pci 0.0 on end # Host bridge + device pci 1.0 on end # PCI/AGP bridge + chip southbridge/intel/i82371eb # Southbridge + device pci 7.0 on # ISA bridge + chip superio/ite/it8671f # Super I/O + device pnp 370.0 on # Floppy + io 0x60 = 0x3f0 + irq 0x70 = 6 + drq 0x74 = 2 + end + device pnp 370.1 on # COM1 + io 0x60 = 0x3f8 + irq 0x70 = 4 + end + device pnp 370.2 on # COM2 + io 0x60 = 0x2f8 + irq 0x70 = 3 + end + device pnp 370.3 on # Parallel port + io 0x60 = 0x378 + irq 0x70 = 7 + end + device pnp 370.5 on # PS/2 keyboard + io 0x60 = 0x60 + io 0x62 = 0x64 + irq 0x70 = 1 + end + device pnp 370.6 on # PS/2 mouse + irq 0x70 = 12 + end + end + end + device pci 7.1 on end # IDE + device pci 7.2 on end # USB + device pci 7.3 on end # ACPI + register "ide0_enable" = "1" + register "ide1_enable" = "1" + register "ide_legacy_enable" = "1" + # Enable UDMA/33 for higher speed if your IDE device(s) support it. + register "ide0_drive0_udma33_enable" = "0" + register "ide0_drive1_udma33_enable" = "0" + register "ide1_drive0_udma33_enable" = "0" + register "ide1_drive1_udma33_enable" = "0" + end + end +end diff --git a/src/mainboard/via/epia-n/Kconfig b/src/mainboard/via/epia-n/Kconfig index 4ecf240a5a..d3e4d2f074 100644 --- a/src/mainboard/via/epia-n/Kconfig +++ b/src/mainboard/via/epia-n/Kconfig @@ -35,3 +35,7 @@ config VIDEO_MB default 32 depends on BOARD_VIA_EPIA_N +config RAMBASE + hex + default 0x4000 + depends on BOARD_VIA_EPIA_N diff --git a/src/mainboard/via/vt8454c/Kconfig b/src/mainboard/via/vt8454c/Kconfig index 8507162739..90ad03f4c1 100644 --- a/src/mainboard/via/vt8454c/Kconfig +++ b/src/mainboard/via/vt8454c/Kconfig @@ -30,3 +30,13 @@ config MAINBOARD_PART_NUMBER string default "VT8454C" depends on BOARD_VIA_VT8454C + +config IRQ_SLOT_COUNT + int + default 15 + depends on BOARD_VIA_VT8454C + +config RAMBASE + hex + default 0x4000 + depends on BOARD_VIA_VT8454C diff --git a/src/northbridge/via/cn400/Kconfig b/src/northbridge/via/cn400/Kconfig index 5df0eb9385..d07a37fd03 100644 --- a/src/northbridge/via/cn400/Kconfig +++ b/src/northbridge/via/cn400/Kconfig @@ -1,3 +1,8 @@ config NORTHBRIDGE_VIA_CN400 bool default n + +config FALLBACK_SIZE + int + default 0 + depends on NORTHBRIDGE_VIA_CN400 diff --git a/src/superio/smsc/lpc47b272/Makefile.inc b/src/superio/smsc/lpc47b272/Makefile.inc index b63e6835f1..c836e3537e 100644 --- a/src/superio/smsc/lpc47b272/Makefile.inc +++ b/src/superio/smsc/lpc47b272/Makefile.inc @@ -19,5 +19,5 @@ ## #config chip.h -obj-$(CONFIG_SUPERIO_SMSC_DEVICE) += superio.o +obj-$(CONFIG_SUPERIO_SMSC_LPC47B272) += superio.o -- cgit v1.2.3