From 8dd2d485b84b103eabae3e01c3b04f529d98ed50 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Tue, 7 Jan 2020 12:00:31 +0200 Subject: intel/nehalem,ibexpeak: Move enable_smbus() call MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: I6e43f7696b289ce9e0319afdcc73889ddabd4db1 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/38297 Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons Reviewed-by: Arthur Heymans --- src/northbridge/intel/nehalem/romstage.c | 3 --- src/southbridge/intel/ibexpeak/early_pch.c | 1 + 2 files changed, 1 insertion(+), 3 deletions(-) (limited to 'src') diff --git a/src/northbridge/intel/nehalem/romstage.c b/src/northbridge/intel/nehalem/romstage.c index 69383e6520..eceb8c2513 100644 --- a/src/northbridge/intel/nehalem/romstage.c +++ b/src/northbridge/intel/nehalem/romstage.c @@ -57,9 +57,6 @@ void mainboard_romstage_entry(void) } } - /* Enable SMBUS. */ - enable_smbus(); - early_thermal_init(); timestamp_add_now(TS_BEFORE_INITRAM); diff --git a/src/southbridge/intel/ibexpeak/early_pch.c b/src/southbridge/intel/ibexpeak/early_pch.c index b76115bf84..e462dd8906 100644 --- a/src/southbridge/intel/ibexpeak/early_pch.c +++ b/src/southbridge/intel/ibexpeak/early_pch.c @@ -44,6 +44,7 @@ static void pch_default_disable(void) void early_pch_init(void) { early_gpio_init(); + enable_smbus(); /* TODO, make this configurable */ pch_setup_cir(NEHALEM_MOBILE); southbridge_configure_default_intmap(); -- cgit v1.2.3