From 91d94b090799b5be5eafb5a82e247d928e982698 Mon Sep 17 00:00:00 2001 From: Patrick Georgi Date: Thu, 14 Apr 2016 14:45:22 +0200 Subject: google/gru: Incorporate feedback to #14279 To avoid diverging too much on an actively developed code base, keep the changes to a separate commit that can be downstreamed more easily: - removed unused includes - gave kevin board a "Kevin" part number - marked RW_LEGACY as CBFS region (to follow up upstream changes) - moved romstage entry point to SoC code (instead of encouraging per-board copy pasta) Change-Id: Ief0c8db3c4af96fe2be2e2397d8874ad06fb6f1f Signed-off-by: Patrick Georgi Reviewed-on: https://review.coreboot.org/14362 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/mainboard/google/gru/Kconfig | 1 + src/mainboard/google/gru/Makefile.inc | 1 - src/mainboard/google/gru/chromeos.c | 4 ---- src/mainboard/google/gru/chromeos.fmd | 2 +- src/mainboard/google/gru/mainboard.c | 5 ----- src/mainboard/google/gru/romstage.c | 34 ---------------------------------- src/soc/rockchip/rk3399/Makefile.inc | 1 + src/soc/rockchip/rk3399/romstage.c | 34 ++++++++++++++++++++++++++++++++++ 8 files changed, 37 insertions(+), 45 deletions(-) delete mode 100644 src/mainboard/google/gru/romstage.c create mode 100644 src/soc/rockchip/rk3399/romstage.c (limited to 'src') diff --git a/src/mainboard/google/gru/Kconfig b/src/mainboard/google/gru/Kconfig index c225d101e1..6f234ad332 100644 --- a/src/mainboard/google/gru/Kconfig +++ b/src/mainboard/google/gru/Kconfig @@ -41,6 +41,7 @@ config MAINBOARD_DIR config MAINBOARD_PART_NUMBER string + default "Kevin" if BOARD_GOOGLE_KEVIN default "Gru" config MAINBOARD_VENDOR diff --git a/src/mainboard/google/gru/Makefile.inc b/src/mainboard/google/gru/Makefile.inc index 752830c4cc..879520c95b 100644 --- a/src/mainboard/google/gru/Makefile.inc +++ b/src/mainboard/google/gru/Makefile.inc @@ -29,7 +29,6 @@ romstage-y += boardid.c romstage-y += chromeos.c romstage-y += memlayout.ld romstage-y += reset.c -romstage-y += romstage.c ramstage-y += boardid.c ramstage-y += chromeos.c diff --git a/src/mainboard/google/gru/chromeos.c b/src/mainboard/google/gru/chromeos.c index 6f9380d33c..da57d861c6 100644 --- a/src/mainboard/google/gru/chromeos.c +++ b/src/mainboard/google/gru/chromeos.c @@ -15,10 +15,6 @@ */ #include -#include -#include -#include -#include #include void fill_lb_gpios(struct lb_gpios *gpios) diff --git a/src/mainboard/google/gru/chromeos.fmd b/src/mainboard/google/gru/chromeos.fmd index c3811707a8..bf30ddff29 100644 --- a/src/mainboard/google/gru/chromeos.fmd +++ b/src/mainboard/google/gru/chromeos.fmd @@ -25,5 +25,5 @@ FLASH@0x0 0x800000 { SHARED_DATA@0x0 0x10000 } RW_NVRAM@0x5f0000 0x10000 - RW_LEGACY@0x600000 0x200000 + RW_LEGACY(CBFS)@0x600000 0x200000 } diff --git a/src/mainboard/google/gru/mainboard.c b/src/mainboard/google/gru/mainboard.c index 1641838a5a..649f16296c 100644 --- a/src/mainboard/google/gru/mainboard.c +++ b/src/mainboard/google/gru/mainboard.c @@ -14,12 +14,7 @@ * */ -#include -#include -#include -#include #include -#include static void mainboard_init(device_t dev) { diff --git a/src/mainboard/google/gru/romstage.c b/src/mainboard/google/gru/romstage.c deleted file mode 100644 index 4786937acc..0000000000 --- a/src/mainboard/google/gru/romstage.c +++ /dev/null @@ -1,34 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright 2016 Rockchip Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -void main(void) -{ - console_init(); - exception_init(); - cbmem_initialize_empty(); - run_ramstage(); -} diff --git a/src/soc/rockchip/rk3399/Makefile.inc b/src/soc/rockchip/rk3399/Makefile.inc index 54a7b5168d..957124e54e 100644 --- a/src/soc/rockchip/rk3399/Makefile.inc +++ b/src/soc/rockchip/rk3399/Makefile.inc @@ -38,6 +38,7 @@ romstage-y += ../common/spi.c romstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c romstage-y += clock.c romstage-y += timer.c +romstage-y += romstage.c ################################################################################ diff --git a/src/soc/rockchip/rk3399/romstage.c b/src/soc/rockchip/rk3399/romstage.c new file mode 100644 index 0000000000..4786937acc --- /dev/null +++ b/src/soc/rockchip/rk3399/romstage.c @@ -0,0 +1,34 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2016 Rockchip Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +void main(void) +{ + console_init(); + exception_init(); + cbmem_initialize_empty(); + run_ramstage(); +} -- cgit v1.2.3