From bc94aeaac81b1c0a697c8a4a81859c96fc68b505 Mon Sep 17 00:00:00 2001 From: Marc Jones Date: Wed, 26 Sep 2018 09:57:08 -0600 Subject: soc/amd/stoneyridge: Add IOMMU support Enable the IOMMU in AGESA and copy the AGESA generated IVRS ACPI table. BUG=b:116196614 TEST=Check dmesg for AMD-Vi messages. Change-Id: I688d867c7bd4949a57b27c1b6a793c6a6e4a717a Signed-off-by: Marc Jones Reviewed-on: https://review.coreboot.org/28753 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel Reviewed-by: Martin Roth --- src/include/device/pci_ids.h | 1 + src/soc/amd/common/block/pi/agesawrapper.c | 3 ++ src/soc/amd/stoneyridge/Makefile.inc | 1 + src/soc/amd/stoneyridge/iommu.c | 55 ++++++++++++++++++++++++++++++ src/soc/amd/stoneyridge/northbridge.c | 2 +- 5 files changed, 61 insertions(+), 1 deletion(-) create mode 100644 src/soc/amd/stoneyridge/iommu.c (limited to 'src') diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index dc3abaeccf..8bf66d99e9 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -298,6 +298,7 @@ #define PCI_DEVICE_ID_AMD_15H_NB_IOMMU 0x1419 #define PCI_DEVICE_ID_AMD_15H_MODEL_303F_NB_IOMMU 0x1423 #define PCI_DEVICE_ID_AMD_16H_MODEL_303F_NB_IOMMU 0x1567 +#define PCI_DEVICE_ID_AMD_15H_MODEL_707F_NB_IOMMU 0x1577 #define PCI_DEVICE_ID_ATI_SB600_LPC 0x438D #define PCI_DEVICE_ID_ATI_SB600_SATA 0x4380 diff --git a/src/soc/amd/common/block/pi/agesawrapper.c b/src/soc/amd/common/block/pi/agesawrapper.c index 7ef2bdacaf..f2ece80f62 100644 --- a/src/soc/amd/common/block/pi/agesawrapper.c +++ b/src/soc/amd/common/block/pi/agesawrapper.c @@ -324,6 +324,9 @@ AGESA_STATUS agesawrapper_amdinitlate(void) */ AMD_LATE_PARAMS *LateParams = create_struct(&AmdParamStruct); + LateParams->GnbLateConfiguration.GnbIoapicId = CONFIG_MAX_CPUS + 1; + LateParams->GnbLateConfiguration.FchIoapicId = CONFIG_MAX_CPUS; + timestamp_add_now(TS_AGESA_INIT_LATE_START); Status = AmdInitLate(LateParams); timestamp_add_now(TS_AGESA_INIT_LATE_DONE); diff --git a/src/soc/amd/stoneyridge/Makefile.inc b/src/soc/amd/stoneyridge/Makefile.inc index a8db2c25a1..c54b65251c 100644 --- a/src/soc/amd/stoneyridge/Makefile.inc +++ b/src/soc/amd/stoneyridge/Makefile.inc @@ -97,6 +97,7 @@ ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi.c ramstage-y += gpio.c ramstage-y += hda.c +ramstage-y += iommu.c ramstage-y += monotonic_timer.c ramstage-y += southbridge.c ramstage-y += sb_util.c diff --git a/src/soc/amd/stoneyridge/iommu.c b/src/soc/amd/stoneyridge/iommu.c new file mode 100644 index 0000000000..e33402ac43 --- /dev/null +++ b/src/soc/amd/stoneyridge/iommu.c @@ -0,0 +1,55 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2013 Rudolf Marek + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include + +static void iommu_read_resources(struct device *dev) +{ + struct resource *res; + + /* Get the normal pci resources of this device */ + pci_dev_read_resources(dev); + + /* Add an extra subtractive resource for both memory and I/O. */ + res = new_resource(dev, 0x44); + res->size = 512 * 1024; + res->align = log2(res->size); + res->gran = log2(res->size); + res->limit = 0xffffffff; /* 4G */ + res->flags = IORESOURCE_MEM; +} + +static struct pci_operations lops_pci = { + .set_subsystem = pci_dev_set_subsystem, +}; + +static struct device_operations iommu_ops = { + .read_resources = iommu_read_resources, + .set_resources = pci_dev_set_resources, + .enable_resources = pci_dev_enable_resources, + .init = 0, + .scan_bus = 0, + .ops_pci = &lops_pci, +}; + +static const struct pci_driver iommu_driver __pci_driver = { + .ops = &iommu_ops, + .vendor = PCI_VENDOR_ID_AMD, + .device = PCI_DEVICE_ID_AMD_15H_MODEL_707F_NB_IOMMU, +}; diff --git a/src/soc/amd/stoneyridge/northbridge.c b/src/soc/amd/stoneyridge/northbridge.c index 912daa05e2..95c2a073cb 100644 --- a/src/soc/amd/stoneyridge/northbridge.c +++ b/src/soc/amd/stoneyridge/northbridge.c @@ -508,7 +508,7 @@ __weak void set_board_env_params(GNB_ENV_CONFIGURATION *params) { } void SetNbEnvParams(GNB_ENV_CONFIGURATION *params) { - params->IommuSupport = FALSE; + params->IommuSupport = TRUE; set_board_env_params(params); } -- cgit v1.2.3