From faf07a8fabb142c8862bfe85ddd1e677e195e023 Mon Sep 17 00:00:00 2001 From: Furquan Shaikh Date: Mon, 25 Jul 2016 16:58:15 -0700 Subject: qualcomm/gale: Add required files to enable elog in ramstage BUG=chrome-os-partner:55639 Change-Id: Idbad4f8763be18002907a62be755b2fdf7e479ec Signed-off-by: Furquan Shaikh Reviewed-on: https://review.coreboot.org/15895 Reviewed-by: Aaron Durbin Tested-by: build bot (Jenkins) --- src/mainboard/google/gale/Makefile.inc | 1 + src/soc/qualcomm/ipq40xx/Makefile.inc | 5 +++++ 2 files changed, 6 insertions(+) (limited to 'src') diff --git a/src/mainboard/google/gale/Makefile.inc b/src/mainboard/google/gale/Makefile.inc index 6c7e55f6bf..855e712914 100644 --- a/src/mainboard/google/gale/Makefile.inc +++ b/src/mainboard/google/gale/Makefile.inc @@ -39,6 +39,7 @@ ramstage-y += chromeos.c ramstage-y += mainboard.c ramstage-y += mmu.c ramstage-y += reset.c +ramstage-y += blsp.c bootblock-y += memlayout.ld romstage-y += memlayout.ld diff --git a/src/soc/qualcomm/ipq40xx/Makefile.inc b/src/soc/qualcomm/ipq40xx/Makefile.inc index 8ea28f06d7..568b0e314e 100644 --- a/src/soc/qualcomm/ipq40xx/Makefile.inc +++ b/src/soc/qualcomm/ipq40xx/Makefile.inc @@ -51,6 +51,11 @@ ramstage-y += uart.c # Want the UART always ready for the kernels' earlyprintk ramstage-y += usb.c ramstage-y += tz_wrapper.S +ramstage-y += blsp.c +ramstage-y += i2c.c +ramstage-y += qup.c +ramstage-y += spi.c + ifeq ($(CONFIG_USE_BLOBS),y) $(objcbfs)/bootblock.bin: $(call strip_quotes,$(CONFIG_SBL_ELF)) \ -- cgit v1.2.3