From e0e784a456c4d64e5e88ce578371fe6c538db559 Mon Sep 17 00:00:00 2001 From: "Ronald G. Minnich" Date: Wed, 26 Nov 2014 19:25:47 +0000 Subject: Add UCB RISCV support for architecture, soc, and emulation mainboard.. Works in the RISCV version of QEMU. Note that the lzmadecode is so unclean that it needs a lot of work. A cleanup is in progress. We decided in Prague to do this as one thing, because it forms a nice case study of the bare minimum you need to add to get a new architecture going in qemu. Change-Id: If5af15c3a70733d219973e0d032746f8ab027e4d Signed-off-by: Ronald G. Minnich Reviewed-on: http://review.coreboot.org/7584 Reviewed-by: Patrick Georgi Tested-by: build bot (Jenkins) --- toolchain.inc | 1 + 1 file changed, 1 insertion(+) (limited to 'toolchain.inc') diff --git a/toolchain.inc b/toolchain.inc index 4d2fe0bba1..e6f530aaf1 100644 --- a/toolchain.inc +++ b/toolchain.inc @@ -57,6 +57,7 @@ ARCHDIR-i386 := x86 ARCHDIR-x86_32 := x86 ARCHDIR-arm := arm ARCHDIR-arm64 := arm64 +ARCHDIR-riscv := riscv CFLAGS_arm := -mno-unaligned-access -ffunction-sections -fdata-sections -- cgit v1.2.3