From 0174ea78bf51fc5f7c6261449835bf621de448b2 Mon Sep 17 00:00:00 2001 From: Johanna Schander Date: Sat, 4 Jan 2020 15:14:59 +0100 Subject: util/inteltool: Add GPIO dumping capabilites for Ice Lake U systems MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This GPIO dumping was implemented using the Document Number: 341080-001 Intel® 495 Series Chipset Family On-Package Platform Controller Hub Volume 1 of 2 datasheet. The GPIO community ports can be found in table 36-1, while the community and pin descriptions are taken from linux/pinctrl/intel/pinctrl-icelake.c . This commit was tested on the late 2019 Razer Blade Stealth with 1065G7 and Chipset 495 PCH and the output manually compared against linux/pinctrl-intel. Change-Id: Ib40f1dbae57169678e92ea9ad0df60ff91b5b22c Signed-off-by: Johanna Schander Reviewed-on: https://review.coreboot.org/c/coreboot/+/38175 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel Reviewed-by: Alexander Couzens --- util/inteltool/pcr.c | 1 + 1 file changed, 1 insertion(+) (limited to 'util/inteltool/pcr.c') diff --git a/util/inteltool/pcr.c b/util/inteltool/pcr.c index ef6bb39d16..f4bf87bfb2 100644 --- a/util/inteltool/pcr.c +++ b/util/inteltool/pcr.c @@ -132,6 +132,7 @@ void pcr_init(struct pci_dev *const sb) case PCI_DEVICE_ID_INTEL_QM370: case PCI_DEVICE_ID_INTEL_HM370: case PCI_DEVICE_ID_INTEL_CM246: + case PCI_DEVICE_ID_INTEL_ICELAKE_LP_U: sbbar_phys = 0xfd000000; use_p2sb = false; break; -- cgit v1.2.3