From 3c78445ad938ee1241f570b9fb1560e66f3e6438 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Tue, 11 Jun 2019 23:23:46 -0500 Subject: inteltool: add support for CannonPoint-LP MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add support for CannonPoint-LP U Premium (CoffeeLake-U and WhiskeyLake-U) GPIO info taken from: - Intel doc #337867-002 - coreboot soc/intel/cannonlake/include/soc/gpio_soc_defs.h Test: Read GPIOs from out-of-tree WhiskeyLake-U board Signed-off-by: Matt DeVillier Change-Id: I70f23eec71abb8d7c2a7a109c9e760bb31dee2ff Reviewed-on: https://review.coreboot.org/c/coreboot/+/39393 Reviewed-by: Michael Niewöhner Reviewed-by: Angel Pons Tested-by: build bot (Jenkins) --- util/inteltool/pcr.c | 1 + 1 file changed, 1 insertion(+) (limited to 'util/inteltool/pcr.c') diff --git a/util/inteltool/pcr.c b/util/inteltool/pcr.c index f4bf87bfb2..8131fdd6a7 100644 --- a/util/inteltool/pcr.c +++ b/util/inteltool/pcr.c @@ -132,6 +132,7 @@ void pcr_init(struct pci_dev *const sb) case PCI_DEVICE_ID_INTEL_QM370: case PCI_DEVICE_ID_INTEL_HM370: case PCI_DEVICE_ID_INTEL_CM246: + case PCI_DEVICE_ID_INTEL_CANNONPOINT_LP_U_PREM: case PCI_DEVICE_ID_INTEL_ICELAKE_LP_U: sbbar_phys = 0xfd000000; use_p2sb = false; -- cgit v1.2.3