From c01fa5ad5ddf8d8cde1ad6d1348fffca3fa61f7f Mon Sep 17 00:00:00 2001 From: Benjamin Doron Date: Wed, 1 Jul 2020 19:20:40 +0000 Subject: util/inteltool: Support dumping more BARs on Skylake mobile SoCs MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Support dumping MCHBAR, EPBAR, DMIBAR and PCIEXBAR on SKL-U/Y. These chipsets are similar to others supported by the tool. Working on SKL-U. Change-Id: Ic43d54ef189d500701872a56e67781a744990328 Signed-off-by: Benjamin Doron Reviewed-on: https://review.coreboot.org/c/coreboot/+/42749 Tested-by: build bot (Jenkins) Reviewed-by: Michael Niewöhner Reviewed-by: Angel Pons --- util/inteltool/memory.c | 4 +++- util/inteltool/pcie.c | 6 ++++++ 2 files changed, 9 insertions(+), 1 deletion(-) (limited to 'util/inteltool') diff --git a/util/inteltool/memory.c b/util/inteltool/memory.c index 1bd127be99..728d4d6d3a 100644 --- a/util/inteltool/memory.c +++ b/util/inteltool/memory.c @@ -207,10 +207,12 @@ int print_mchbar(struct pci_dev *nb, struct pci_access *pacc, const char *dump_s case PCI_DEVICE_ID_INTEL_CORE_4TH_GEN_U: case PCI_DEVICE_ID_INTEL_CORE_5TH_GEN_U: case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_D2: + case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_U: + case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_Y: + case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_M: case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_WST: case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_D: case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_E: - case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_M: case PCI_DEVICE_ID_INTEL_CORE_7TH_GEN_U: case PCI_DEVICE_ID_INTEL_CORE_7TH_GEN_Y: case PCI_DEVICE_ID_INTEL_CORE_7TH_GEN_U_Q: diff --git a/util/inteltool/pcie.c b/util/inteltool/pcie.c index e5828ccfbe..d392c2810e 100644 --- a/util/inteltool/pcie.c +++ b/util/inteltool/pcie.c @@ -251,6 +251,8 @@ int print_epbar(struct pci_dev *nb) case PCI_DEVICE_ID_INTEL_CORE_4TH_GEN_U: case PCI_DEVICE_ID_INTEL_CORE_5TH_GEN_U: case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_D2: + case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_U: + case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_Y: case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_M: case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_WST: case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_D: @@ -380,6 +382,8 @@ int print_dmibar(struct pci_dev *nb) dmibar_phys &= 0x0000007ffffff000UL; /* 38:12 */ break; case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_D2: + case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_U: + case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_Y: case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_M: case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_WST: case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_D: @@ -493,6 +497,8 @@ int print_pciexbar(struct pci_dev *nb) case PCI_DEVICE_ID_INTEL_CORE_4TH_GEN_U: case PCI_DEVICE_ID_INTEL_CORE_5TH_GEN_U: case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_D2: + case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_U: + case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_Y: case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_M: case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_WST: case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_D: -- cgit v1.2.3