From 3f3f53cd5e05eead7a8b8616244a4665bd14b22b Mon Sep 17 00:00:00 2001 From: Raul E Rangel Date: Wed, 6 May 2020 11:47:04 -0600 Subject: util/sconfig: Add LPC and ESPI buses Picasso has an LPC and eSPI bridge on the same PCI DEVFN. They can both be active at the same time. This adds a way to specify which devices belong on which bus. i.e., device pci 14.3 on # - D14F3 bridge device espi 0 on chip ec/google/chromeec device pnp 0c09.0 on end end end device lpc 0 on end end BUG=b:154445472 TEST=Built trembyle and saw static.c contained the espi bus. Signed-off-by: Raul E Rangel Change-Id: I0c2f40813c05680f72e5f30cbb13617e8f994841 Reviewed-on: https://review.coreboot.org/c/coreboot/+/41099 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- util/sconfig/main.c | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'util/sconfig/main.c') diff --git a/util/sconfig/main.c b/util/sconfig/main.c index b0c53385c6..6676baea90 100644 --- a/util/sconfig/main.c +++ b/util/sconfig/main.c @@ -493,6 +493,14 @@ struct device *new_device(struct bus *parent, case MMIO: new_d->path = ".type=DEVICE_PATH_MMIO,{.mmio={ .addr = 0x%x }}"; break; + + case ESPI: + new_d->path = ".type=DEVICE_PATH_ESPI,{.espi={ .addr = 0x%x }}"; + break; + + case LPC: + new_d->path = ".type=DEVICE_PATH_LPC,{.lpc={ .addr = 0x%x }}"; + break; } return new_d; -- cgit v1.2.3