From e1822d9f2461b301c6f9efc6f5131849a68f9fc7 Mon Sep 17 00:00:00 2001 From: David Hendricks Date: Thu, 22 Jul 2010 22:56:44 +0000 Subject: Superiotool support for Nuvoton WPCE775x/NPCE781x. Signed-off-by: David Hendricks Acked-by: Carl-Daniel Hailfinger git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5667 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- util/superiotool/superiotool.h | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'util/superiotool/superiotool.h') diff --git a/util/superiotool/superiotool.h b/util/superiotool/superiotool.h index c953038528..d465115d1e 100644 --- a/util/superiotool/superiotool.h +++ b/util/superiotool/superiotool.h @@ -143,6 +143,10 @@ void print_ite_chips(void); void probe_idregs_nsc(uint16_t port); void print_nsc_chips(void); +/* nuvoton.c */ +void probe_idregs_nuvoton(uint16_t port); +void print_nuvoton_chips(void); + /* smsc.c */ void probe_idregs_smsc(uint16_t port); void print_smsc_chips(void); @@ -167,6 +171,9 @@ static const struct { /* Only use 0x370 for ITE, but 0x3f0 or 0x3bd would also be valid. */ {probe_idregs_ite, {0x2e, 0x4e, 0x370, EOT}}, {probe_idregs_nsc, {0x2e, 0x4e, 0x15c, EOT}}, + /* I/O pairs on Nuvoton EC chips can be configured by firmware in + * addition to the following hardware strapping options. */ + {probe_idregs_nuvoton, {0x164e, 0x2e, EOT}}, {probe_idregs_smsc, {0x2e, 0x4e, 0x162e, 0x164e, 0x3f0, 0x370, EOT}}, {probe_idregs_winbond, {0x2e, 0x4e, 0x3f0, 0x370, 0x250, EOT}}, #ifdef PCI_SUPPORT @@ -182,6 +189,7 @@ static const struct { {print_fintek_chips}, {print_ite_chips}, {print_nsc_chips}, + {print_nuvoton_chips}, {print_smsc_chips}, {print_winbond_chips}, #ifdef PCI_SUPPORT -- cgit v1.2.3