From 806892a347e2cc0f94a224e994c0a94c2ab720e9 Mon Sep 17 00:00:00 2001 From: Zheng Bao Date: Tue, 27 Apr 2021 17:21:54 +0800 Subject: amdfwtool: Remove the misleading option characters Change-Id: I8b0d53d5e5eb494741b7fac32029cf16cabe66d8 Signed-off-by: Zheng Bao Reviewed-on: https://review.coreboot.org/c/coreboot/+/52657 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth Reviewed-by: David Hendricks --- util/amdfwtool/amdfwtool.c | 261 ++++++++++++++++++++++++++------------------- 1 file changed, 151 insertions(+), 110 deletions(-) (limited to 'util') diff --git a/util/amdfwtool/amdfwtool.c b/util/amdfwtool/amdfwtool.c index 46910cbfc8..9aed7d008d 100644 --- a/util/amdfwtool/amdfwtool.c +++ b/util/amdfwtool/amdfwtool.c @@ -153,50 +153,50 @@ static uint32_t fletcher32(const void *data, int length) static void usage(void) { printf("amdfwtool: Create AMD Firmware combination\n"); - printf("Usage: amdfwtool [options] -f -o \n"); - printf("-x | --xhci Add XHCI blob\n"); - printf("-i | --imc Add IMC blob\n"); - printf("-g | --gec Add GEC blob\n"); + printf("Usage: amdfwtool [options] --flashsize --output \n"); + printf("--xhci Add XHCI blob\n"); + printf("--imc Add IMC blob\n"); + printf("--gec Add GEC blob\n"); printf("\nPSP options:\n"); - printf("-A | --combo-capable Place PSP directory pointer at Embedded Firmware\n"); + printf("--combo-capable Place PSP directory pointer at Embedded\n"); + printf(" Firmware\n"); printf(" offset able to support combo directory\n"); - printf("-M | --multilevel Generate primary and secondary tables\n"); - printf("-n | --nvram Add nvram binary\n"); - printf("-T | --soft-fuse Set soft fuse\n"); - printf("-U | --token-unlock Set token unlock\n"); - printf("-W | --whitelist Set if there is a whitelist\n"); - printf("-S | --use-pspsecureos Set if psp secure OS is needed\n"); - printf("-p | --load-mp2-fw Set if load MP2 firmware\n"); - printf("-L | --load-s0i3 Set if load s0i3 firmware\n"); - printf("-Z | --verstage Add verstage\n"); - printf("-E | --verstage_sig Add verstage signature\n"); + printf("--multilevel Generate primary and secondary tables\n"); + printf("--nvram Add nvram binary\n"); + printf("--soft-fuse Set soft fuse\n"); + printf("--token-unlock Set token unlock\n"); + printf("--whitelist Set if there is a whitelist\n"); + printf("--use-pspsecureos Set if psp secure OS is needed\n"); + printf("--load-mp2-fw Set if load MP2 firmware\n"); + printf("--load-s0i3 Set if load s0i3 firmware\n"); + printf("--verstage Add verstage\n"); + printf("--verstage_sig Add verstage signature\n"); printf("\nBIOS options:\n"); - printf("-I | --instance Sets instance field for the next BIOS\n"); + printf("--instance Sets instance field for the next BIOS\n"); printf(" firmware\n"); - printf("-a | --apcb Add AGESA PSP customization block\n"); - printf("-Q | --apob-base Destination for AGESA PSP output block\n"); - printf("-F | --apob-nv-base Location of S3 resume data\n"); - printf("-H | --apob-nv-size Size of S3 resume data\n"); - printf("-O | --ucode Add microcode patch\n"); - printf("-V | --bios-bin Add compressed image; auto source address\n"); - printf("-e | --bios-bin-src Address in flash of source if -V not used\n"); - printf("-v | --bios-bin-dest Destination for uncompressed BIOS\n"); - printf("-j | --bios-uncomp-size Uncompressed size of BIOS image\n"); - printf("-o | --output Output filename\n"); - printf("-f | --flashsize ROM size in bytes\n"); + printf("--apcb Add AGESA PSP customization block\n"); + printf("--apob-base Destination for AGESA PSP output block\n"); + printf("--apob-nv-base Location of S3 resume data\n"); + printf("--apob-nv-size Size of S3 resume data\n"); + printf("--ucode Add microcode patch\n"); + printf("--bios-bin Add compressed image; auto source address\n"); + printf("--bios-bin-src Address in flash of source if -V not used\n"); + printf("--bios-bin-dest Destination for uncompressed BIOS\n"); + printf("--bios-uncomp-size Uncompressed size of BIOS image\n"); + printf("--output output filename\n"); + printf("--flashsize ROM size in bytes\n"); printf(" size must be larger than %dKB\n", MIN_ROM_KB); printf(" and must a multiple of 1024\n"); - printf("-l | --location Location of Directory\n"); - printf("-q | --anywhere Use any 64-byte aligned addr for Directory\n"); - printf("-R | --sharedmem Location of PSP/FW shared memory\n"); - printf("-P | --sharedmem-size Maximum size of the PSP/FW shared memory\n"); + printf("--location Location of Directory\n"); + printf("--anywhere Use any 64-byte aligned addr for Directory\n"); + printf("--sharedmem Location of PSP/FW shared memory\n"); + printf("--sharedmem-size Maximum size of the PSP/FW shared memory\n"); printf(" area\n"); - printf("-C | --soc-name Specify SOC name. Supported names are\n"); + printf("--soc-name Specify SOC name. Supported names are\n"); printf(" Stoneyridge, Raven, Picasso, Renoir, Cezanne\n"); printf(" or Lucienne\n"); - printf("-h | --help Show this help\n"); printf("\nEmbedded Firmware Structure options used by the PSP:\n"); printf("--spi-speed SPI fast speed to place in EFS Table\n"); printf(" 0x0 66.66Mhz\n"); @@ -219,9 +219,11 @@ static void usage(void) printf(" 0x1 Micron parts are always used\n"); printf(" 0x2 Micron parts optional, this option is only\n"); printf(" supported with RN/LCN SOC\n"); - printf("-c | --config Config file\n"); - printf("-d | --debug Print debug message\n"); - printf("-D | --depend List out the firmware files\n"); + printf("\nGeneral options:\n"); + printf("-c|--config Config file\n"); + printf("-d|--debug Print debug message\n"); + printf("-l|--list List out the firmware files\n"); + printf("-h|--help Show this help\n"); } amd_fw_entry amd_psp_fw_table[] = { @@ -1068,60 +1070,99 @@ static void integrate_bios_firmwares(context *ctx, } enum { + AMDFW_OPT_CONFIG = 'c', + AMDFW_OPT_DEBUG = 'd', + AMDFW_OPT_HELP = 'h', + AMDFW_OPT_LIST_DEPEND = 'l', + + AMDFW_OPT_XHCI = 128, + AMDFW_OPT_IMC, + AMDFW_OPT_GEC, + AMDFW_OPT_COMBO, + AMDFW_OPT_MULTILEVEL, + AMDFW_OPT_NVRAM, + + AMDFW_OPT_FUSE, + AMDFW_OPT_UNLOCK, + AMDFW_OPT_WHITELIST, + AMDFW_OPT_USE_PSPSECUREOS, + AMDFW_OPT_LOAD_MP2FW, + AMDFW_OPT_LOAD_S0I3, + AMDFW_OPT_VERSTAGE, + AMDFW_OPT_VERSTAGE_SIG, + + AMDFW_OPT_INSTANCE, + AMDFW_OPT_APCB, + AMDFW_OPT_APOBBASE, + AMDFW_OPT_BIOSBIN, + AMDFW_OPT_BIOSBIN_SOURCE, + AMDFW_OPT_BIOSBIN_DEST, + AMDFW_OPT_BIOS_UNCOMP_SIZE, + AMDFW_OPT_UCODE, + AMDFW_OPT_APOB_NVBASE, + AMDFW_OPT_APOB_NVSIZE, + + AMDFW_OPT_OUTPUT, + AMDFW_OPT_FLASHSIZE, + AMDFW_OPT_LOCATION, + AMDFW_OPT_ANYWHERE, + AMDFW_OPT_SHAREDMEM, + AMDFW_OPT_SHAREDMEM_SIZE, + AMDFW_OPT_SOC_NAME, /* begin after ASCII characters */ LONGOPT_SPI_READ_MODE = 256, LONGOPT_SPI_SPEED = 257, LONGOPT_SPI_MICRON_FLAG = 258, }; -/* Unused values: BGJKNXYbkmprstuwyz*/ -static const char *optstring = "x:i:g:AMn:T:SPLUW:I:a:Q:V:e:v:j:O:F:" - "H:o:f:l:hZ:qR:C:c:E:dD"; +static char const optstring[] = {AMDFW_OPT_CONFIG, ':', + AMDFW_OPT_DEBUG, AMDFW_OPT_HELP, AMDFW_OPT_LIST_DEPEND +}; static struct option long_options[] = { - {"xhci", required_argument, 0, 'x' }, - {"imc", required_argument, 0, 'i' }, - {"gec", required_argument, 0, 'g' }, + {"xhci", required_argument, 0, AMDFW_OPT_XHCI }, + {"imc", required_argument, 0, AMDFW_OPT_IMC }, + {"gec", required_argument, 0, AMDFW_OPT_GEC }, /* PSP Directory Table items */ - {"combo-capable", no_argument, 0, 'A' }, - {"multilevel", no_argument, 0, 'M' }, - {"nvram", required_argument, 0, 'n' }, - {"soft-fuse", required_argument, 0, 'T' }, - {"token-unlock", no_argument, 0, 'U' }, - {"whitelist", required_argument, 0, 'W' }, - {"use-pspsecureos", no_argument, 0, 'S' }, - {"load-mp2-fw", no_argument, 0, 'p' }, - {"load-s0i3", no_argument, 0, 'L' }, - {"verstage", required_argument, 0, 'Z' }, - {"verstage_sig", required_argument, 0, 'E' }, + {"combo-capable", no_argument, 0, AMDFW_OPT_COMBO }, + {"multilevel", no_argument, 0, AMDFW_OPT_MULTILEVEL }, + {"nvram", required_argument, 0, AMDFW_OPT_NVRAM }, + {"soft-fuse", required_argument, 0, AMDFW_OPT_FUSE }, + {"token-unlock", no_argument, 0, AMDFW_OPT_UNLOCK }, + {"whitelist", required_argument, 0, AMDFW_OPT_WHITELIST }, + {"use-pspsecureos", no_argument, 0, AMDFW_OPT_USE_PSPSECUREOS }, + {"load-mp2-fw", no_argument, 0, AMDFW_OPT_LOAD_MP2FW }, + {"load-s0i3", no_argument, 0, AMDFW_OPT_LOAD_S0I3 }, + {"verstage", required_argument, 0, AMDFW_OPT_VERSTAGE }, + {"verstage_sig", required_argument, 0, AMDFW_OPT_VERSTAGE_SIG }, /* BIOS Directory Table items */ - {"instance", required_argument, 0, 'I' }, - {"apcb", required_argument, 0, 'a' }, - {"apob-base", required_argument, 0, 'Q' }, - {"bios-bin", required_argument, 0, 'V' }, - {"bios-bin-src", required_argument, 0, 'e' }, - {"bios-bin-dest", required_argument, 0, 'v' }, - {"bios-uncomp-size", required_argument, 0, 'j' }, - {"ucode", required_argument, 0, 'O' }, - {"apob-nv-base", required_argument, 0, 'F' }, - {"apob-nv-size", required_argument, 0, 'H' }, + {"instance", required_argument, 0, AMDFW_OPT_INSTANCE }, + {"apcb", required_argument, 0, AMDFW_OPT_APCB }, + {"apob-base", required_argument, 0, AMDFW_OPT_APOBBASE }, + {"bios-bin", required_argument, 0, AMDFW_OPT_BIOSBIN }, + {"bios-bin-src", required_argument, 0, AMDFW_OPT_BIOSBIN_SOURCE }, + {"bios-bin-dest", required_argument, 0, AMDFW_OPT_BIOSBIN_DEST }, + {"bios-uncomp-size", required_argument, 0, AMDFW_OPT_BIOS_UNCOMP_SIZE }, + {"ucode", required_argument, 0, AMDFW_OPT_UCODE }, + {"apob-nv-base", required_argument, 0, AMDFW_OPT_APOB_NVBASE }, + {"apob-nv-size", required_argument, 0, AMDFW_OPT_APOB_NVSIZE }, /* Embedded Firmware Structure items*/ {"spi-read-mode", required_argument, 0, LONGOPT_SPI_READ_MODE }, {"spi-speed", required_argument, 0, LONGOPT_SPI_SPEED }, {"spi-micron-flag", required_argument, 0, LONGOPT_SPI_MICRON_FLAG }, /* other */ - {"output", required_argument, 0, 'o' }, - {"flashsize", required_argument, 0, 'f' }, - {"location", required_argument, 0, 'l' }, - {"anywhere", no_argument, 0, 'q' }, - {"sharedmem", required_argument, 0, 'R' }, - {"sharedmem-size", required_argument, 0, 'P' }, - {"soc-name", required_argument, 0, 'C' }, - - {"config", required_argument, 0, 'c' }, - {"debug", no_argument, 0, 'd' }, - {"help", no_argument, 0, 'h' }, - {"depend", no_argument, 0, 'D' }, + {"output", required_argument, 0, AMDFW_OPT_OUTPUT }, + {"flashsize", required_argument, 0, AMDFW_OPT_FLASHSIZE }, + {"location", required_argument, 0, AMDFW_OPT_LOCATION }, + {"anywhere", no_argument, 0, AMDFW_OPT_ANYWHERE }, + {"sharedmem", required_argument, 0, AMDFW_OPT_SHAREDMEM }, + {"sharedmem-size", required_argument, 0, AMDFW_OPT_SHAREDMEM_SIZE }, + {"soc-name", required_argument, 0, AMDFW_OPT_SOC_NAME }, + + {"config", required_argument, 0, AMDFW_OPT_CONFIG }, + {"debug", no_argument, 0, AMDFW_OPT_DEBUG }, + {"help", no_argument, 0, AMDFW_OPT_HELP }, + {"list", no_argument, 0, AMDFW_OPT_LIST_DEPEND }, {NULL, 0, 0, 0 } }; @@ -1340,48 +1381,48 @@ int main(int argc, char **argv) break; switch (c) { - case 'x': + case AMDFW_OPT_XHCI: register_fw_filename(AMD_FW_XHCI, sub, optarg); sub = instance = 0; break; - case 'i': + case AMDFW_OPT_IMC: register_fw_filename(AMD_FW_IMC, sub, optarg); sub = instance = 0; break; - case 'g': + case AMDFW_OPT_GEC: register_fw_filename(AMD_FW_GEC, sub, optarg); sub = instance = 0; break; - case 'A': + case AMDFW_OPT_COMBO: comboable = 1; break; - case 'M': + case AMDFW_OPT_MULTILEVEL: multi = 1; break; - case 'U': + case AMDFW_OPT_UNLOCK: register_fw_token_unlock(); cb_config.unlock_secure = 1; sub = instance = 0; break; - case 'S': + case AMDFW_OPT_USE_PSPSECUREOS: cb_config.use_secureos = 1; break; - case 'I': + case AMDFW_OPT_INSTANCE: instance = strtoul(optarg, &tmp, 16); break; - case 'p': + case AMDFW_OPT_LOAD_MP2FW: cb_config.load_mp2_fw = 1; break; - case 'n': + case AMDFW_OPT_NVRAM: register_fw_filename(AMD_FW_PSP_NVRAM, sub, optarg); sub = instance = 0; break; - case 'T': + case AMDFW_OPT_FUSE: register_fw_fuse(optarg); fuse_defined = 1; sub = 0; break; - case 'a': + case AMDFW_OPT_APCB: if ((instance & 0xF0) == 0) register_bdt_data(AMD_BIOS_APCB, sub, instance & 0xF, optarg); else @@ -1389,62 +1430,62 @@ int main(int argc, char **argv) instance & 0xF, optarg); sub = instance = 0; break; - case 'Q': + case AMDFW_OPT_APOBBASE: /* APOB destination */ register_fw_addr(AMD_BIOS_APOB, 0, optarg, 0); sub = instance = 0; break; - case 'F': + case AMDFW_OPT_APOB_NVBASE: /* APOB NV source */ register_fw_addr(AMD_BIOS_APOB_NV, optarg, 0, 0); sub = instance = 0; break; - case 'H': + case AMDFW_OPT_APOB_NVSIZE: /* APOB NV size */ register_fw_addr(AMD_BIOS_APOB_NV, 0, 0, optarg); sub = instance = 0; break; - case 'V': + case AMDFW_OPT_BIOSBIN: register_bdt_data(AMD_BIOS_BIN, sub, instance, optarg); sub = instance = 0; break; - case 'e': + case AMDFW_OPT_BIOSBIN_SOURCE: /* BIOS source */ register_fw_addr(AMD_BIOS_BIN, optarg, 0, 0); sub = instance = 0; break; - case 'v': + case AMDFW_OPT_BIOSBIN_DEST: /* BIOS destination */ register_fw_addr(AMD_BIOS_BIN, 0, optarg, 0); sub = instance = 0; break; - case 'j': + case AMDFW_OPT_BIOS_UNCOMP_SIZE: /* BIOS destination size */ register_fw_addr(AMD_BIOS_BIN, 0, 0, optarg); sub = instance = 0; break; - case 'O': + case AMDFW_OPT_UCODE: register_bdt_data(AMD_BIOS_UCODE, sub, instance, optarg); sub = instance = 0; break; - case 'L': + case AMDFW_OPT_LOAD_S0I3: cb_config.s0i3 = 1; break; - case 'W': + case AMDFW_OPT_WHITELIST: register_fw_filename(AMD_FW_PSP_WHITELIST, sub, optarg); sub = instance = 0; cb_config.have_whitelist = 1; break; - case 'Z': + case AMDFW_OPT_VERSTAGE: register_fw_filename(AMD_FW_PSP_VERSTAGE, sub, optarg); sub = instance = 0; break; - case 'E': + case AMDFW_OPT_VERSTAGE_SIG: register_fw_filename(AMD_FW_VERSTAGE_SIG, sub, optarg); sub = instance = 0; break; - case 'C': + case AMDFW_OPT_SOC_NAME: soc_id = identify_platform(optarg); if (soc_id == PLATFORM_UNKNOWN) { fprintf(stderr, "Error: Invalid SOC name specified\n\n"); @@ -1464,10 +1505,10 @@ int main(int argc, char **argv) efs_spi_micron_flag = strtoull(optarg, NULL, 16); sub = instance = 0; break; - case 'o': + case AMDFW_OPT_OUTPUT: output = optarg; break; - case 'f': + case AMDFW_OPT_FLASHSIZE: ctx.rom_size = (uint32_t)strtoul(optarg, &tmp, 16); if (*tmp != '\0') { fprintf(stderr, "Error: ROM size specified" @@ -1475,7 +1516,7 @@ int main(int argc, char **argv) retval = 1; } break; - case 'l': + case AMDFW_OPT_LOCATION: dir_location = (uint32_t)strtoul(optarg, &tmp, 16); if (*tmp != '\0') { fprintf(stderr, "Error: Directory Location specified" @@ -1483,30 +1524,30 @@ int main(int argc, char **argv) retval = 1; } break; - case 'q': + case AMDFW_OPT_ANYWHERE: any_location = 1; break; - case 'R': + case AMDFW_OPT_SHAREDMEM: /* shared memory destination */ register_fw_addr(AMD_BIOS_PSP_SHARED_MEM, 0, optarg, 0); sub = instance = 0; break; - case 'P': + case AMDFW_OPT_SHAREDMEM_SIZE: /* shared memory size */ register_fw_addr(AMD_BIOS_PSP_SHARED_MEM, NULL, NULL, optarg); sub = instance = 0; break; - case 'c': + case AMDFW_OPT_CONFIG: config = optarg; break; - case 'd': + case AMDFW_OPT_DEBUG: debug = 1; break; - case 'h': + case AMDFW_OPT_HELP: usage(); return 0; - case 'D': + case AMDFW_OPT_LIST_DEPEND: list_deps = 1; break; default: -- cgit v1.2.3