#
# This file is part of the coreboot project.
#
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 2 of the License, or
# (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
# GNU General Public License for more details.
#

chip northbridge/intel/sandybridge
	register "gfx.use_spread_spectrum_clock" = "0"
	register "gpu_cpu_backlight" = "0x00000000"
	register "gpu_dp_b_hotplug" = "4"
	register "gpu_dp_c_hotplug" = "4"
	register "gpu_dp_d_hotplug" = "4"
	register "gpu_panel_port_select" = "0"
	register "gpu_panel_power_backlight_off_delay" = "0"
	register "gpu_panel_power_backlight_on_delay" = "0"
	register "gpu_panel_power_cycle_delay" = "4"
	register "gpu_panel_power_down_delay" = "0"
	register "gpu_panel_power_up_delay" = "0"
	register "gpu_pch_backlight" = "0x00000000"
	device cpu_cluster 0x0 on
		chip cpu/intel/model_206ax
			register "c1_acpower" = "1"
			register "c1_battery" = "1"
			register "c2_acpower" = "3"
			register "c2_battery" = "3"
			register "c3_acpower" = "5"
			register "c3_battery" = "5"
			device lapic 0x0 on end
			device lapic 0xacac off end
		end
	end
	device domain 0x0 on
		device pci 00.0 on
			subsystemid 0x1849 0x0150
		end
		device pci 01.0 on
			subsystemid 0x1849 0x0151
		end
		device pci 02.0 on
			subsystemid 0x1849 0x0152
		end
		chip southbridge/intel/bd82x6x
			register "c2_latency" = "0x0065"
			register "docking_supported" = "0"
			register "gen1_dec" = "0x000c0291"
			register "gen2_dec" = "0x000c0241"
			register "gen3_dec" = "0x000c0251"
			register "pcie_hotplug_map" = "{ 0, 0, 0, 0, 0, 0, 0, 0 }"
			register "pcie_port_coalesce" = "0"
			register "sata_interface_speed_support" = "0x3"
			register "sata_port_map" = "0x3f"
			register "superspeed_capable_ports" = "0x0000000f"
			register "xhci_overcurrent_mapping" = "0x00000c03"
			register "xhci_switchable_ports" = "0x0000000f"
			register "spi_uvscc" = "0x2005"
			register "spi_lvscc" = "0x2005"

			device pci 14.0 on # USB 3.0 Controller
				subsystemid 0x1849 0x1e31
			end
			device pci 16.0 on # Management Engine Interface 1
				subsystemid 0x1849 0x1e3a
			end
			device pci 16.1 off # Management Engine Interface 2
			end
			device pci 16.2 off # Management Engine IDE-R
			end
			device pci 16.3 on # Management Engine KT
				subsystemid 0x1849 0x1e3d
			end
			device pci 19.0 off # Intel Gigabit Ethernet
			end
			device pci 1a.0 on # USB2 EHCI #2
				subsystemid 0x1849 0x1e2d
			end
			device pci 1b.0 on # High Definition Audio Audio controller
				subsystemid 0x1849 0x8892
			end
			device pci 1c.0 on # PCIe Port #1
				subsystemid 0x1849 0x1e10
			end
			device pci 1c.1 off # PCIe Port #2
			end
			device pci 1c.2 off # PCIe Port #3
			end
			device pci 1c.3 off # PCIe Port #4
			end
			device pci 1c.4 on # PCIe Port #5, ASMedia ASM1062 SATA Controller
				subsystemid 0x1849 0x1e18
			end
			device pci 1c.5 on # PCIe Port #6, Realtek PCIe GbE Controller
				subsystemid 0x1849 0x1e1a
			end
			device pci 1c.6 off # PCIe Port #7
			end
			device pci 1c.7 off # PCIe Port #8
			end
			device pci 1d.0 on # USB2 EHCI #1
				subsystemid 0x1849 0x1e26
			end
			device pci 1e.0 on # PCI bridge
				subsystemid 0x1849 0x244e
			end
			device pci 1f.0 on # LPC bridge
				subsystemid 0x1849 0x1e49
				chip superio/nuvoton/nct6776
					device pnp 2e.0 off end		# Floppy
					device pnp 2e.1 on		# Parallel port
						# global
						irq 0x1c = 0x80
						irq 0x27 = 0xc0
						irq 0x2a = 0x62
						# parallel port
						io 0x60 = 0x378
						irq 0x70 = 5
						drq 0x74 = 3
					end
					device pnp 2e.2 on		# COM1
						io 0x60 = 0x3f8
						irq 0x70 = 4
					end
					device pnp 2e.3 off end		# COM2, IR
					device pnp 2e.5 on		# Keyboard
						io 0x60 = 0x60
						io 0x62 = 0x64
						irq 0x70 = 1
						irq 0x72 = 12
					end
					device pnp 2e.6 off end		# CIR
					device pnp 2e.7 off end		# GPIO6-9
					device pnp 2e.8 off end		# WDT1, GPIO0, GPIO1, GPIOA
					device pnp 2e.9 off end		# GPIO2-5
					device pnp 2e.a on		# ACPI
						irq 0xe0 = 0x01
						irq 0xe3 = 0x14
						irq 0xe6 = 0x4c
						irq 0xe9 = 0x02
						irq 0xf0 = 0x20
					end
					device pnp 2e.b off	end		# HWM, front pannel LED
					device pnp 2e.d on end		# VID
					device pnp 2e.e off end		# CIR WAKE-UP
					device pnp 2e.f on end		# GPIO Push-Pull or Open-drain
					device pnp 2e.14 on end		# SVID
					device pnp 2e.16 on end		# Deep Sleep
					device pnp 2e.17 on end		# GPIOA
				end
			end
			device pci 1f.2 on # SATA Controller 1
				subsystemid 0x1849 0x1e02
			end
			device pci 1f.3 on # SMBus
				subsystemid 0x1849 0x1e22
			end
			device pci 1f.5 off # SATA Controller 2
			end
			device pci 1f.6 off # Thermal
			end
		end
	end
end