/* * This file is part of the coreboot project. * * Copyright 2020 The coreboot project Authors. * * SPDX-License-Identifier: GPL-2.0-or-later */ #include #include #include #include #include void fill_lb_gpios(struct lb_gpios *gpios) { struct lb_gpio chromeos_gpios[] = { {-1, ACTIVE_HIGH, get_write_protect_state(), "write protect"}, {-1, ACTIVE_HIGH, get_lid_switch(), "lid"}, {-1, ACTIVE_HIGH, 0, "power"}, {-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"}, }; lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios)); } int get_write_protect_state(void) { /* No write protect */ return 0; } void mainboard_chromeos_acpi_generate(void) { const struct cros_gpio *gpios; size_t num; gpios = variant_cros_gpios(&num); chromeos_acpi_gpio_generate(gpios, num); }