chip soc/intel/broadwell # Enable DisplayPort 1 Hotplug with 6ms pulse register "gpu_dp_d_hotplug" = "0x06" # Enable DisplayPort 0 Hotplug with 6ms pulse register "gpu_dp_c_hotplug" = "0x06" # Enable DVI Hotplug with 6ms pulse register "gpu_dp_b_hotplug" = "0x06" register "pirqa_routing" = "0x8b" register "pirqb_routing" = "0x8a" register "pirqc_routing" = "0x8b" register "pirqd_routing" = "0x8b" register "pirqe_routing" = "0x80" register "pirqf_routing" = "0x80" register "pirqg_routing" = "0x80" register "pirqh_routing" = "0x80" register "alt_gp_smi_en" = "0x0000" register "gpe0_en_1" = "0x00000400" register "gpe0_en_2" = "0x00000000" register "gpe0_en_3" = "0x00000000" register "gpe0_en_4" = "0x00000000" register "sata_port_map" = "0x2" register "sio_acpi_mode" = "1" device cpu_cluster 0 on device lapic 0 on end end device domain 0 on device pci 00.0 on end # host bridge device pci 02.0 on end # vga controller device pci 03.0 on end # mini-hd audio device pci 13.0 off end # Smart Sound Audio DSP device pci 14.0 on end # USB3 XHCI device pci 15.0 on end # Serial I/O DMA device pci 15.1 on end # I2C0 device pci 15.2 on end # I2C1 device pci 15.3 off end # GSPI0 device pci 15.4 off end # GSPI1 device pci 15.5 off end # UART0 device pci 15.6 off end # UART1 device pci 16.0 on end # Management Engine Interface 1 device pci 16.1 off end # Management Engine Interface 2 device pci 16.2 off end # Management Engine IDE-R device pci 16.3 off end # Management Engine KT device pci 17.0 off end # SDIO device pci 19.0 off end # GbE device pci 1b.0 on end # High Definition Audio device pci 1c.0 on end # PCIe Port #1 device pci 1c.1 on end # PCIe Port #2 device pci 1c.2 on end # PCIe Port #3 device pci 1c.3 on end # PCIe Port #4 device pci 1c.4 on end # PCIe Port #5 device pci 1c.5 on end # PCIe Port #6 device pci 1d.0 off end # USB2 EHCI device pci 1e.0 off end # PCI bridge device pci 1f.0 on end # LPC bridge device pci 1f.2 on end # SATA Controller device pci 1f.3 on end # SMBus device pci 1f.6 on end # Thermal end end