chip soc/intel/xeon_sp/cpx
	device cpu_cluster 0 on
		device lapic 0 on end
	end
	device domain 0 on
		device pci 00.0 on end # Host bridge
		device pci 04.0 on end
		device pci 04.1 on end
		device pci 04.2 on end
		device pci 04.3 on end
		device pci 04.4 on end
		device pci 04.5 on end
		device pci 04.6 on end
		device pci 04.7 on end
		device pci 05.0 on end
		device pci 05.2 on end
		device pci 05.4 on end
		device pci 08.0 on end
		device pci 08.1 on end
		device pci 08.2 on end
		device pci 11.0 on end
		device pci 11.1 on end
		device pci 11.5 on end
		device pci 14.0 on end
		device pci 16.0 on end
		device pci 16.1 on end
		device pci 16.4 on end
		device pci 17.0 on end
		device pci 1c.0 on end
		device pci 1c.4 on end
		device pci 1f.2 on end
		device pci 1f.4 on end
		device pci 1f.5 on end

		device pci 1f.0 on	# LPC/eSPI Interface
		end

	end
end