/* * This file is part of the coreboot project. * * Copyright (C) 2007-2009 coresystems GmbH * Copyright (C) 2013 Google Inc. * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as * published by the Free Software Foundation; version 2 of * the License. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ /* Intel LPC Bus Device - 0:1f.0 */ Device (LPC0) { Name(_ADR, 0x001f0000) #include "irqlinks.asl" Device (FWH) // Firmware Hub { Name (_HID, EISAID("INT0800")) Name (_CRS, ResourceTemplate() { Memory32Fixed(ReadOnly, 0xff000000, 0x01000000) }) } Device (HPET) { Name (_HID, EISAID("PNP0103")) Name (_CID, 0x010CD041) Method (_STA, 0) // Device Status { Return (0xf) // Enable and show device } Name(_CRS, ResourceTemplate() { Memory32Fixed(ReadOnly, 0xfed00000, 0x400) }) } Device(LDRC) // LPC device: Resource consumption { Name (_HID, EISAID("PNP0C02")) Name (_UID, 2) Name (RBUF, ResourceTemplate() { IO (Decode16, 0x61, 0x61, 0x1, 0x01) // NMI Status IO (Decode16, 0x63, 0x63, 0x1, 0x01) // CPU Reserved IO (Decode16, 0x65, 0x65, 0x1, 0x01) // CPU Reserved IO (Decode16, 0x67, 0x67, 0x1, 0x01) // CPU Reserved IO (Decode16, 0x80, 0x80, 0x1, 0x01) // Port 80 Post IO (Decode16, 0x92, 0x92, 0x1, 0x01) // CPU Reserved IO (Decode16, 0xb2, 0xb2, 0x1, 0x02) // SWSMI }) Method (_CRS, 0, NotSerialized) { Return (RBUF) } } Device (RTC) // Real Time Clock { Name (_HID, EISAID("PNP0B00")) Name (_CRS, ResourceTemplate() { IO (Decode16, 0x70, 0x70, 1, 8) }) } Device (TIMR) // Intel 8254 timer { Name(_HID, EISAID("PNP0100")) Name(_CRS, ResourceTemplate() { IO (Decode16, 0x40, 0x40, 0x01, 0x04) IO (Decode16, 0x50, 0x50, 0x10, 0x04) IRQNoFlags() {0} }) } }