##
## This file is part of the coreboot project.
##
## Copyright (C) 2008-2009 coresystems GmbH
##               2012 secunet security Networks AG
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##

config SOUTHBRIDGE_INTEL_I82801IX
	bool
	select SOUTHBRIDGE_INTEL_COMMON
	select IOAPIC
	select HAVE_USBDEBUG
	select HAVE_HARD_RESET
	select USE_WATCHDOG_ON_BOOT
	select HAVE_SMI_HANDLER

if SOUTHBRIDGE_INTEL_I82801IX

config EHCI_BAR
	hex
	default 0xfef00000

config EHCI_DEBUG_OFFSET
	hex
	default 0xa0

config USBDEBUG_DEFAULT_PORT
	int
	default 1

config BOOTBLOCK_SOUTHBRIDGE_INIT
        string
	default "southbridge/intel/i82801ix/bootblock.c"

endif