/* $NoKeywords:$ */ /** * @file * * Install of build options for a DevTest platform solution * * This file generates the defaults tables for the "DevTest" platform solution * set of processors. The documented build options are imported from a user * controlled file for processing. * * @xrefitem bom "File Content Label" "Release Content" * @e project: AGESA * @e sub-project: Core * @e \$Revision: 49633 $ @e \$Date: 2011-03-26 06:52:29 +0800 (Sat, 26 Mar 2011) $ */ /***************************************************************************** * * Copyright (c) 2011, Advanced Micro Devices, Inc. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of Advanced Micro Devices, Inc. nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * ***************************************************************************/ #include "cpuRegisters.h" #include "cpuFamRegisters.h" #include "cpuFamilyTranslation.h" #include "AdvancedApi.h" #include "heapManager.h" #include "CreateStruct.h" #include "cpuFeatures.h" #include "Table.h" #include "CommonReturns.h" #include "cpuEarlyInit.h" #include "cpuLateInit.h" #include "GnbInterfaceStub.h" /***************************************************************************** * Define the RELEASE VERSION string * * The Release Version string should identify the next planned release. * When a branch is made in preparation for a release, the release manager * should change/confirm that the branch version of this file contains the * string matching the desired version for the release. The trunk version of * the file should always contain a trailing 'X'. This will make sure that a * development build from trunk will not be confused for a released version. * The release manager will need to remove the trailing 'X' and update the * version string as appropriate for the release. The trunk copy of this file * should also be updated/incremented for the next expected version, + trailing 'X' ****************************************************************************/ // This is the delivery package title, "DevTest " // This string MUST be exactly 8 characters long #define AGESA_PACKAGE_STRING {'D', 'e', 'v', 'T', 'e', 's', 't', ' '} // This is the release version number of the AGESA component // This string MUST be exactly 12 characters long #define AGESA_VERSION_STRING {'V', '0', '.', '1', '.', '2', '.', '3', 'X', ' ', ' ', ' '} // The DevTest solution is defined to be everything that AGESA supports. #define INSTALL_C32_SOCKET_SUPPORT TRUE #define INSTALL_G34_SOCKET_SUPPORT TRUE #define INSTALL_S1G4_SOCKET_SUPPORT TRUE #define INSTALL_ASB2_SOCKET_SUPPORT TRUE #define INSTALL_AM3_SOCKET_SUPPORT TRUE #define INSTALL_FS1_SOCKET_SUPPORT TRUE #define INSTALL_FM1_SOCKET_SUPPORT TRUE #define INSTALL_FM2_SOCKET_SUPPORT TRUE #define INSTALL_FT1_SOCKET_SUPPORT TRUE #define INSTALL_FT2_SOCKET_SUPPORT TRUE #define INSTALL_FP2_SOCKET_SUPPORT TRUE #define INSTALL_FAMILY_10_SUPPORT TRUE #define INSTALL_FAMILY_12_SUPPORT TRUE #define INSTALL_FAMILY_14_SUPPORT TRUE #define INSTALL_FAMILY_15_SUPPORT TRUE // The following definitions specify the default values for various parameters in which there are // no clearly defined defaults to be used in the common file. The values below are based on product // and BKDG content, please consult the AGESA Memory team for consultation. #define DFLT_SCRUB_DRAM_RATE (0xFF) #define DFLT_SCRUB_L2_RATE (0x10) #define DFLT_SCRUB_L3_RATE (0x10) #define DFLT_SCRUB_IC_RATE (0) #define DFLT_SCRUB_DC_RATE (0x12) #define DFLT_MEMORY_QUADRANK_TYPE QUADRANK_REGISTERED #define DFLT_VRM_SLEW_RATE (2500) #define DFLT_SMBUS0_BASE_ADDRESS 0xB00 #define DFLT_SMBUS1_BASE_ADDRESS 0xB20 #define DFLT_SIO_PME_BASE_ADDRESS 0xE00 #define DFLT_ACPI_PM1_EVT_BLOCK_ADDRESS 0x400 #define DFLT_ACPI_PM1_CNT_BLOCK_ADDRESS 0x404 #define DFLT_ACPI_PM_TMR_BLOCK_ADDRESS 0x408 #define DFLT_ACPI_CPU_CNT_BLOCK_ADDRESS 0x410 #define DFLT_ACPI_GPE0_BLOCK_ADDRESS 0x420 #define DFLT_SPI_BASE_ADDRESS 0xFEC10000 #define DFLT_WATCHDOG_TIMER_BASE_ADDRESS 0xFEC00000 #define DFLT_HPET_BASE_ADDRESS 0xFED00000 #define DFLT_SMI_CMD_PORT 0xB0 #define DFLT_ACPI_PMA_CNT_BLK_ADDRESS 0xFE00 #define DFLT_GEC_BASE_ADDRESS 0xFED61000 #define DFLT_AZALIA_SSID 0x780D1022 #define DFLT_SMBUS_SSID 0x780B1022 #define DFLT_IDE_SSID 0x780C1022 #define DFLT_SATA_AHCI_SSID 0x78011022 #define DFLT_SATA_IDE_SSID 0x78001022 #define DFLT_SATA_RAID5_SSID 0x78031022 #define DFLT_SATA_RAID_SSID 0x78021022 #define DFLT_EHCI_SSID 0x78081022 #define DFLT_OHCI_SSID 0x78071022 #define DFLT_LPC_SSID 0x780E1022 #define DFLT_FCH_GPP_LINK_CONFIG PortA4 #define DFLT_FCH_GPP_PORT0_PRESENT FALSE #define DFLT_FCH_GPP_PORT1_PRESENT FALSE #define DFLT_FCH_GPP_PORT2_PRESENT FALSE #define DFLT_FCH_GPP_PORT3_PRESENT FALSE #define DFLT_FCH_GPP_PORT0_HOTPLUG FALSE #define DFLT_FCH_GPP_PORT1_HOTPLUG FALSE #define DFLT_FCH_GPP_PORT2_HOTPLUG FALSE #define DFLT_FCH_GPP_PORT3_HOTPLUG FALSE // Instantiate all solution relevant data. #include "PlatformInstall.h"