1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
|
##
## This file is part of the coreboot repair project.
##
## Redistribution and use in source and binary forms, with or without
## modification, are permitted provided that the following conditions
## are met:
## 1. Redistributions of source code must retain the above copyright
## notice, this list of conditions and the following disclaimer.
## 2. Redistributions in binary form must reproduce the above copyright
## notice, this list of conditions and the following disclaimer in the
## documentation and/or other materials provided with the distribution.
## 3. The name of the author may not be used to endorse or promote products
## derived from this software without specific prior written permission.
##
## THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
## ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
## IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
## ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
## FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
## DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
## OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
## HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
## LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
## OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
## SUCH DAMAGE.
##
mainmenu "Coreboot Configuration"
source src/mainboard/Kconfig
source src/arch/i386/Kconfig
source src/arch/ppc/Kconfig
source src/devices/Kconfig
source src/northbridge/Kconfig
source src/southbridge/Kconfig
source src/superio/Kconfig
source src/cpu/Kconfig
config CBFS
bool
default y
config HAVE_HIGH_TABLES
bool
default y
config PCI_BUS_SEGN_BITS
int
default 0
config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
hex
default 0
config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
hex
default 0
config CPU_ADDR_BITS
int
default 36
config XIP_ROM_BASE
hex
default 0xfffe0000
config XIP_ROM_SIZE
hex
default 0x20000
config LB_CKS_RANGE_START
int
default 49
config LB_CKS_RANGE_END
int
default 125
config LB_CKS_LOC
int
default 126
config LOGICAL_CPUS
int
default 1
config PCI_ROM_RUN
int
default 0
config HT_CHAIN_UNITID_BASE
int
default 1
config HT_CHAIN_END_UNITID_BASE
int
default 32
config HEAP_SIZE
hex
default 0x2000
config COREBOOT_V2
bool
default y
config COREBOOT_V4
bool
default y
config DEBUG
bool
default n
config USE_PRINTK_IN_CAR
bool
default n
config USE_OPTION_TABLE
bool
default n
config MAX_CPUS
int
default 1
config MMCONF_SUPPORT_DEFAULT
bool
default n
config MMCONF_SUPPORT
bool
default n
config LB_MEM_TOPK
int
default 2048
config MULTIBOOT
bool
default n
config COMPRESSED_PAYLOAD_LZMA
bool
default y
config COMPRESSED_PAYLOAD_NRV2B
bool
default n
source src/console/Kconfig
config HAVE_ACPI_RESUME
bool
default n
config ACPI_SSDTX_NUM
int
default 0
config HAVE_ACPI_TABLES
bool
default n
config HAVE_FALLBACK_BOOT
bool
default y
config USE_FALLBACK_IMAGE
bool
default y
config HAVE_HARD_RESET
bool
default n
config HAVE_INIT_TIMER
bool
default n
config HAVE_MAINBOARD_RESOURCES
bool
default n
config HAVE_MOVNTI
bool
default y
config HAVE_MP_TABLE
bool
default n
config HAVE_OPTION_TABLE
bool
default y
config HAVE_PIRQ_TABLE
bool
default n
config PIRQ_ROUTE
bool
default n
config HAVE_SMI_HANDLER
bool
default n
config PCI_IO_CFG_EXT
bool
default n
config IOAPIC
bool
default n
# TODO
# menu "Drivers"
#
# endmenu
menu "Payload"
config COMPRESSED_PAYLOAD_LZMA
bool "Use LZMA compression for payloads"
default yes
choice
prompt "Payload type"
default PAYLOAD_NONE
config PAYLOAD_ELF
bool "An ELF executable payload file"
help
Select this option if you have a payload image (an ELF file)
which coreboot should run as soon as the basic hardware
initialization is completed.
You will be able to specify the location and file name of the
payload image later.
config VGA_BIOS
bool "Add a VGA BIOS image"
depends on PAYLOAD_ELF
help
Select this option if you have a VGA BIOS image that you would
like to add to your ROM.
You will be able to specify the location and file name of the
image later.
config PAYLOAD_NONE
bool "No payload"
help
Select this option if you want to create an "empty" coreboot
ROM image for a certain mainboard, i.e. a coreboot ROM image
which does not yet contain a payload.
For such an image to be useful, you have to use the 'cbfs' tool
to add a payload to the ROM image later.
endchoice
config FALLBACK_PAYLOAD_FILE
string "Payload path and filename"
depends on PAYLOAD_ELF
default "payload.elf"
help
The path and filename of the ELF executable file to use as payload.
config FALLBACK_VGA_BIOS_FILE
string "VGA BIOS path and filename"
depends on VGA_BIOS
default "vgabios.bin"
help
The path and filename of the file to use as VGA BIOS.
config FALLBACK_VGA_BIOS_ID
string "VGA BIOS ID"
depends on VGA_BIOS
default "1106,3230"
help
The ID that would associate your VGA BIOS to your video card.
endmenu
config GDB_STUB
bool "GDB debugging support"
default y
help
If enabled, you will be able to set breakpoints for gdb debugging.
See src/arch/i386/lib/c_start.S for details.
|
