summaryrefslogtreecommitdiff
path: root/src/Kconfig
blob: e4b4e0377a4b2c3dd176676083c0c1d7be7d18fc (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
##
## This file is part of the coreboot project.
##
## Copyright (C) 2009-2010 coresystems GmbH
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
##

mainmenu "Coreboot Configuration"

menu "General setup"

config EXPERT
	bool "Expert mode"
	help
	  This allows you to select certain advanced configuration options.

	  Warning: Only enable this option if you really know what you are
	  doing! You have been warned!

config LOCALVERSION
	string "Local version string"
	help
	  Append an extra string to the end of the coreboot version.

	  This can be useful if, for instance, you want to append the
	  respective board's hostname or some other identifying string to
	  the coreboot version number, so that you can easily distinguish
	  boot logs of different boards from each other.

config CBFS_PREFIX
	string "CBFS prefix to use"
	default "fallback"
	help
	  Select the prefix to all files put into the image. It's "fallback"
	  by default, "normal" is a common alternative.

choice
	prompt "Compiler"
	default COMPILER_GCC
	help
	  This option allows you to select the compiler used for building
	  coreboot.

config COMPILER_GCC
	bool "GCC"
config COMPILER_LLVM_CLANG
	bool "LLVM/clang"
endchoice

config SCANBUILD_ENABLE
	bool "Build with scan-build for static analysis"
	default n
	help
	  Changes the build process to scan-build is used.
	  Requires scan-build in path.

config SCANBUILD_REPORT_LOCATION
	string "Directory to put scan-build report in"
	default ""
	depends on SCANBUILD_ENABLE
	help
	  Where the scan-build report should be stored

config CCACHE
	bool "ccache"
	default n
	help
	  Enables the use of ccache for faster builds.
	  Requires ccache in path.

endmenu

source src/mainboard/Kconfig
source src/arch/i386/Kconfig

menu "Chipset"

comment "CPU"
source src/cpu/Kconfig
comment "Northbridge"

menu "HyperTransport setup"
	depends on (NORTHBRIDGE_AMD_AMDK8 || NORTHBRIDGE_AMD_AMDFAM10) && EXPERT

choice
	prompt "HyperTransport frequency"
	default LIMIT_HT_SPEED_AUTO
	help
	  This option sets the maximum permissible HyperTransport link
	  frequency.

	  Use of this option will only limit the autodetected HT frequency.
	  It will not (and cannot) increase the frequency beyond the
	  autodetected limits.

	  This is primarily used to work around poorly designed or laid out
	  HT traces on certain motherboards.

config LIMIT_HT_SPEED_200
	bool "Limit HT frequency to 200MHz"
config LIMIT_HT_SPEED_400
	bool "Limit HT frequency to 400MHz"
config LIMIT_HT_SPEED_600
	bool "Limit HT frequency to 600MHz"
config LIMIT_HT_SPEED_800
	bool "Limit HT frequency to 800MHz"
config LIMIT_HT_SPEED_1000
	bool "Limit HT frequency to 1.0GHz"
config LIMIT_HT_SPEED_1200
	bool "Limit HT frequency to 1.2GHz"
config LIMIT_HT_SPEED_1400
	bool "Limit HT frequency to 1.4GHz"
config LIMIT_HT_SPEED_1600
	bool "Limit HT frequency to 1.6GHz"
config LIMIT_HT_SPEED_1800
	bool "Limit HT frequency to 1.8GHz"
config LIMIT_HT_SPEED_2000
	bool "Limit HT frequency to 2.0GHz"
config LIMIT_HT_SPEED_2200
	bool "Limit HT frequency to 2.2GHz"
config LIMIT_HT_SPEED_2400
	bool "Limit HT frequency to 2.4GHz"
config LIMIT_HT_SPEED_2600
	bool "Limit HT frequency to 2.6GHz"
config LIMIT_HT_SPEED_AUTO
	bool "Autodetect HT frequency"
endchoice

choice
	prompt "HyperTransport downlink width"
	default LIMIT_HT_DOWN_WIDTH_16
	help
	  This option sets the maximum permissible HyperTransport
	  downlink width.

	  Use of this option will only limit the autodetected HT width.
	  It will not (and cannot) increase the width beyond the autodetected
	  limits.

	  This is primarily used to work around poorly designed or laid out HT
	  traces on certain motherboards.

config LIMIT_HT_DOWN_WIDTH_8
	bool "8 bits"
config LIMIT_HT_DOWN_WIDTH_16
	bool "16 bits"
endchoice

choice
	prompt "HyperTransport uplink width"
	default LIMIT_HT_UP_WIDTH_16
	help
	  This option sets the maximum permissible HyperTransport
	  uplink width.

	  Use of this option will only limit the autodetected HT width.
	  It will not (and cannot) increase the width beyond the autodetected
	  limits.

	  This is primarily used to work around poorly designed or laid out HT
	  traces on certain motherboards.

config LIMIT_HT_UP_WIDTH_8
	bool "8 bits"
config LIMIT_HT_UP_WIDTH_16
	bool "16 bits"
endchoice

endmenu

source src/northbridge/Kconfig
comment "Southbridge"
source src/southbridge/Kconfig
comment "Super I/O"
source src/superio/Kconfig
comment "Devices"
source src/devices/Kconfig

endmenu

config PCI_BUS_SEGN_BITS
	int
	default 0

config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
	hex
	default 0x0

config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
	hex
	default 0x0

config CPU_ADDR_BITS
	int
	default 36

config XIP_ROM_BASE
	hex
	default 0xfffe0000

config XIP_ROM_SIZE
	hex
	default 0x20000

config LB_CKS_RANGE_START
	int
	default 49

config LB_CKS_RANGE_END
	int
	default 125

config LB_CKS_LOC
	int
	default 126

config LOGICAL_CPUS
	bool
	default y

config PCI_ROM_RUN
	bool
	default n

config HEAP_SIZE
	hex
	default 0x4000

config DEBUG
	bool
	default n

config USE_PRINTK_IN_CAR
	bool
	default n

config USE_OPTION_TABLE
	bool
	default n

config MAX_CPUS
	int
	default 1

config MMCONF_SUPPORT_DEFAULT
	bool
	default n

config MMCONF_SUPPORT
	bool
	default n

config RAMTOP
	hex
	default 0x200000

config ATI_RAGE_XL
	bool

source src/console/Kconfig

config HAVE_ACPI_RESUME
	bool
	default n

config ACPI_SSDTX_NUM
	int
	default 0

config HAVE_HARD_RESET
	bool
	default y if BOARD_HAS_HARD_RESET
	default n
	help
	  This variable specifies whether a given board has a hard_reset
	  function, no matter if it's provided by board code or chipset code.

config HAVE_INIT_TIMER
	bool
	default n if UDELAY_IO
	default y

config HAVE_MAINBOARD_RESOURCES
	bool
	default n

config HAVE_OPTION_TABLE
	bool
	default y
	help
	  This variable specifies whether a given board has a cmos.layout
	  file containing NVRAM/CMOS bit definitions.
	  It defaults to 'y' but can be changed to 'n' in mainboard/*/Kconfig.

config PIRQ_ROUTE
	bool
	default n

config HAVE_SMI_HANDLER
	bool
	default n

config PCI_IO_CFG_EXT
	bool
	default n

config IOAPIC
	bool
	default n

# TODO: Can probably be removed once all chipsets have kconfig options for it.
config VIDEO_MB
	int
	default 0

config USE_WATCHDOG_ON_BOOT
	bool
	default n

config VGA
	bool
	default n
	help
	  Build board-specific VGA code.

config GFXUMA
	bool
	default n
	help
	  Enable Unified Memory Architecture for graphics.

# TODO
# menu "Drivers"
#
# endmenu

#TODO Remove this option or make it useful.
config HAVE_LOW_TABLES
	bool
	default y
	help
	  This Option is unused in the code.  Since two boards try to set it to
	  'n', they may be broken.  We either need to make the option useful or
	  get rid of it.  The broken boards are:
	  asus/m2v-mx_se
	  supermicro/h8dme

config HAVE_HIGH_TABLES
	bool
	default y
	help
	  This variable specifies whether a given northbridge has high table
	  support.
	  It is set in northbridge/*/Kconfig.
	  Whether or not the high tables are actually written by coreboot is
	  configurable by the user via WRITE_HIGH_TABLES.

config HAVE_ACPI_TABLES
	bool
	help
	  This variable specifies whether a given board has ACPI table support.
	  It is usually set in mainboard/*/Kconfig.
	  Whether or not the ACPI tables are actually generated by coreboot
	  is configurable by the user via GENERATE_ACPI_TABLES.

config HAVE_MP_TABLE
	bool
	help
	  This variable specifies whether a given board has MP table support.
	  It is usually set in mainboard/*/Kconfig.
	  Whether or not the MP table is actually generated by coreboot
	  is configurable by the user via GENERATE_MP_TABLE.

config HAVE_PIRQ_TABLE
	bool
	help
	  This variable specifies whether a given board has PIRQ table support.
	  It is usually set in mainboard/*/Kconfig.
	  Whether or not the PIRQ table is actually generated by coreboot
	  is configurable by the user via GENERATE_PIRQ_TABLE.

#These Options are here to avoid "undefined" warnings.
#The actual selection and help texts are in the following menu.

config GENERATE_ACPI_TABLES
	bool
	default HAVE_ACPI_TABLES

config GENERATE_MP_TABLE
	bool
	default HAVE_MP_TABLE

config GENERATE_PIRQ_TABLE
	bool
	default HAVE_PIRQ_TABLE

config WRITE_HIGH_TABLES
	bool
	default HAVE_HIGH_TABLES

menu "System tables"

config WRITE_HIGH_TABLES
	bool "Write 'high' tables to avoid being overwritten in F segment"
	depends on HAVE_HIGH_TABLES
	default y

config MULTIBOOT
	bool "Generate Multiboot tables (for GRUB2)"
	default y

config GENERATE_ACPI_TABLES
	depends on HAVE_ACPI_TABLES
	bool "Generate ACPI tables"
	default y
	help
	  Generate ACPI tables for this board.

	  If unsure, say Y.

config GENERATE_MP_TABLE
	depends on HAVE_MP_TABLE
	bool "Generate an MP table"
	default y
	help
	  Generate an MP table (conforming to the Intel MultiProcessor
	  specification 1.4) for this board.

	  If unsure, say Y.

config GENERATE_PIRQ_TABLE
	depends on HAVE_PIRQ_TABLE
	bool "Generate a PIRQ table"
	default y
	help
	  Generate a PIRQ table for this board.

	  If unsure, say Y.

endmenu

menu "Payload"

choice
	prompt "Add a payload"
	default PAYLOAD_NONE

config PAYLOAD_NONE
	bool "None"
	help
	  Select this option if you want to create an "empty" coreboot
	  ROM image for a certain mainboard, i.e. a coreboot ROM image
	  which does not yet contain a payload.

	  For such an image to be useful, you have to use 'cbfstool'
	  to add a payload to the ROM image later.

config PAYLOAD_ELF
	bool "An ELF executable payload"
	help
	  Select this option if you have a payload image (an ELF file)
	  which coreboot should run as soon as the basic hardware
	  initialization is completed.

	  You will be able to specify the location and file name of the
	  payload image later.

endchoice

config FALLBACK_PAYLOAD_FILE
	string "Payload path and filename"
	depends on PAYLOAD_ELF
	default "payload.elf"
	help
	  The path and filename of the ELF executable file to use as payload.

# TODO: Defined if no payload? Breaks build?
config COMPRESSED_PAYLOAD_LZMA
	bool "Use LZMA compression for payloads"
	default y
	depends on PAYLOAD_ELF
	help
	  In order to reduce the size payloads take up in the ROM chip
	  coreboot can compress them using the LZMA algorithm.

config COMPRESSED_PAYLOAD_NRV2B
	bool
	default n

endmenu

menu "VGA BIOS"

config VGA_BIOS
	bool "Add a VGA BIOS image"
	help
	  Select this option if you have a VGA BIOS image that you would
	  like to add to your ROM.

	  You will be able to specify the location and file name of the
	  image later.

config FALLBACK_VGA_BIOS_FILE
	string "VGA BIOS path and filename"
	depends on VGA_BIOS
	default "vgabios.bin"
	help
	  The path and filename of the file to use as VGA BIOS.

config FALLBACK_VGA_BIOS_ID
	string "VGA device PCI IDs"
	depends on VGA_BIOS
	default "1106,3230"
	help
	  The comma-separated PCI vendor and device ID that would associate
	  your VGA BIOS to your video card.

	  Example: 1106,3230

	  In the above example 1106 is the PCI vendor ID (in hex, but without
	  the "0x" prefix) and 3230 specifies the PCI device ID of the
	  video card (also in hex, without "0x" prefix).

config INTEL_MBI
	bool "Add an MBI image"
	depends on NORTHBRIDGE_INTEL_I82830
	help
	  Select this option if you have an Intel MBI image that you would
	  like to add to your ROM.

	  You will be able to specify the location and file name of the
	  image later.

config FALLBACK_MBI_FILE
	string "Intel MBI path and filename"
	depends on INTEL_MBI
	default "mbi.bin"
	help
	  The path and filename of the file to use as VGA BIOS.

endmenu

menu "Bootsplash"
	depends on PCI_OPTION_ROM_RUN_YABEL

config BOOTSPLASH
	prompt "Show graphical bootsplash"
	bool
	depends on PCI_OPTION_ROM_RUN_YABEL
	help
	  This option shows a graphical bootsplash screen. The grapics are
	  loaded from the CBFS file bootsplash.jpg.

config FALLBACK_BOOTSPLASH_FILE
	string "Bootsplash path and filename"
	depends on BOOTSPLASH
	default "bootsplash.jpg"
	help
	  The path and filename of the file to use as graphical bootsplash 
	  screen. The file format has to be jpg. 

# TODO: Turn this into a "choice".
config FRAMEBUFFER_VESA_MODE
	prompt "VESA framebuffer video mode"
	hex
	default 0x117
	depends on BOOTSPLASH
	help
	  This option sets the resolution used for the coreboot framebuffer and
	  bootsplash screen. Set to 0x117 for 1024x768x16. A diligent soul will
	  some day make this a "choice".

config COREBOOT_KEEP_FRAMEBUFFER
	prompt "Keep VESA framebuffer"
	bool
	depends on BOOTSPLASH
	help
	  This option keeps the framebuffer mode set after coreboot finishes
	  execution. If this option is enabled, coreboot will pass a
	  framebuffer entry in its coreboot table and the payload will need a
	  framebuffer driver. If this option is disabled, coreboot will switch
	  back to text mode before handing control to a payload.

endmenu

menu "Debugging"

# TODO: Better help text and detailed instructions.
config GDB_STUB
	bool "GDB debugging support"
	default y
	help
	  If enabled, you will be able to set breakpoints for gdb debugging.
	  See src/arch/i386/lib/c_start.S for details.

config DEBUG_RAM_SETUP
	bool "Output verbose RAM init debug messages"
	default n
	depends on (NORTHBRIDGE_AMD_AMDFAM10 \
		 || NORTHBRIDGE_AMD_AMDK8 \
		 || NORTHBRIDGE_VIA_CN700 \
		 || NORTHBRIDGE_VIA_CX700 \
		 || NORTHBRIDGE_VIA_VX800 \
		 || NORTHBRIDGE_INTEL_E7501 \
		 || NORTHBRIDGE_INTEL_I440BX \
		 || NORTHBRIDGE_INTEL_I82810 \
		 || NORTHBRIDGE_INTEL_I82830 \
		 || NORTHBRIDGE_INTEL_I945)
	help
	  This option enables additional RAM init related debug messages.
	  It is recommended to enable this when debugging issues on your
	  board which might be RAM init related.

	  Note: This option will increase the size of the coreboot image.

	  If unsure, say N.

config DEBUG_SMBUS
	bool "Output verbose SMBus debug messages"
	default n
	depends on (SOUTHBRIDGE_VIA_VT8237R \
		 || NORTHBRIDGE_VIA_VX800 \
		 || NORTHBRIDGE_VIA_CX700 \
		 || NORTHBRIDGE_AMD_AMDK8)
	help
	  This option enables additional SMBus (and SPD) debug messages.

	  Note: This option will increase the size of the coreboot image.

	  If unsure, say N.

config DEBUG_SMI
	bool "Output verbose SMI debug messages"
	default n
	depends on HAVE_SMI_HANDLER
	help
	  This option enables additional SMI related debug messages.

	  Note: This option will increase the size of the coreboot image.

	  If unsure, say N.

config X86EMU_DEBUG
	bool "Output verbose x86emu debug messages"
	default n
	depends on PCI_OPTION_ROM_RUN_YABEL
	help
	  This option enables additional x86emu related debug messages.

	  Note: This option will increase the size of the coreboot image.

	  If unsure, say N.

config X86EMU_DEBUG_JMP
	bool "Trace JMP/RETF"
	default n
	depends on X86EMU_DEBUG
	help
	  Print information about JMP and RETF opcodes from x86emu.

	  Note: This option will increase the size of the coreboot image.

	  If unsure, say N.

config X86EMU_DEBUG_TRACE
	bool "Trace all opcodes"
	default n
	depends on X86EMU_DEBUG
	help
	  Print _all_ opcodes that are executed by x86emu.
	  
	  WARNING: This will produce a LOT of output and take a long time.

	  Note: This option will increase the size of the coreboot image.

	  If unsure, say N.

config X86EMU_DEBUG_PNP
	bool "Log Plug&Play accesses"
	default n
	depends on X86EMU_DEBUG
	help
	  Print Plug And Play accesses made by option ROMs.

	  Note: This option will increase the size of the coreboot image.

	  If unsure, say N.

config X86EMU_DEBUG_DISK
	bool "Log Disk I/O"
	default n
	depends on X86EMU_DEBUG
	help
	  Print Disk I/O related messages.

	  Note: This option will increase the size of the coreboot image.

	  If unsure, say N.

config X86EMU_DEBUG_PMM
	bool "Log PMM"
	default n
	depends on X86EMU_DEBUG
	help
	  Print messages related to POST Memory Manager (PMM).

	  Note: This option will increase the size of the coreboot image.

	  If unsure, say N.


config X86EMU_DEBUG_VBE
	bool "Debug VESA BIOS Extensions"
	default n
	depends on X86EMU_DEBUG
	help
	  Print messages related to VESA BIOS Extension (VBE) functions.

	  Note: This option will increase the size of the coreboot image.

	  If unsure, say N.

config X86EMU_DEBUG_INT10
	bool "Redirect INT10 output to console"
	default n
	depends on X86EMU_DEBUG
	help
	  Let INT10 (i.e. character output) calls print messages to debug output.

	  Note: This option will increase the size of the coreboot image.

	  If unsure, say N.

config X86EMU_DEBUG_INTERRUPTS
	bool "Log intXX calls"
	default n
	depends on X86EMU_DEBUG
	help
	  Print messages related to interrupt handling.

	  Note: This option will increase the size of the coreboot image.

	  If unsure, say N.

config X86EMU_DEBUG_CHECK_VMEM_ACCESS
	bool "Log special memory accesses"
	default n
	depends on X86EMU_DEBUG
	help
	  Print messages related to accesses to certain areas of the virtual
	  memory (e.g. BDA (BIOS Data Area) or interrupt vectors)

	  Note: This option will increase the size of the coreboot image.

	  If unsure, say N.

config X86EMU_DEBUG_MEM
	bool "Log all memory accesses"
	default n
	depends on X86EMU_DEBUG
	help
	  Print memory accesses made by option ROM.
	  Note: This also includes accesses to fetch instructions.

	  Note: This option will increase the size of the coreboot image.

	  If unsure, say N.

config X86EMU_DEBUG_IO
	bool "Log IO accesses"
	default n
	depends on X86EMU_DEBUG
	help
	  Print I/O accesses made by option ROM.

	  Note: This option will increase the size of the coreboot image.

	  If unsure, say N.

config LLSHELL
	bool "Built-in low-level shell"
	default n
	help
	  If enabled, you will have a low level shell to examine your machine.
	  Put llshell() in your (romstage) code to start the shell.
	  See src/arch/i386/llshell/llshell.inc for details.

endmenu

config LIFT_BSP_APIC_ID
	bool
	default n

# These probably belong somewhere else, but they are needed somewhere.
config AP_CODE_IN_CAR
	bool
	default n

config USE_INIT
	bool
	default n

config ENABLE_APIC_EXT_ID
	bool
	default n

config WARNINGS_ARE_ERRORS
	bool
	default n

config ID_SECTION_OFFSET
	hex
	default 0x10

source src/Kconfig.deprecated_options