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##
## This file is part of the coreboot repair project.
##
## Redistribution and use in source and binary forms, with or without
## modification, are permitted provided that the following conditions
## are met:
## 1. Redistributions of source code must retain the above copyright
## notice, this list of conditions and the following disclaimer.
## 2. Redistributions in binary form must reproduce the above copyright
## notice, this list of conditions and the following disclaimer in the
## documentation and/or other materials provided with the distribution.
## 3. The name of the author may not be used to endorse or promote products
## derived from this software without specific prior written permission.
##
## THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
## ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
## IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
## ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
## FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
## DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
## OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
## HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
## LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
## OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
## SUCH DAMAGE.
##
mainmenu "Coreboot Configuration"
menu "General setup"
config LOCALVERSION
string "Local version string"
help
Append an extra string to the end of the coreboot version.
This can be useful if, for instance, you want to append the
respective board's hostname or some other identifying string to
the coreboot version number, so that you can easily distinguish
boot logs of different boards from each other.
endmenu
source src/mainboard/Kconfig
source src/arch/i386/Kconfig
source src/arch/ppc/Kconfig
source src/northbridge/Kconfig
source src/devices/Kconfig
source src/southbridge/Kconfig
source src/superio/Kconfig
source src/cpu/Kconfig
config PCI_BUS_SEGN_BITS
int
default 0
config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
hex
default 0x0
config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
hex
default 0x0
config CPU_ADDR_BITS
int
default 36
config AGP_APERTURE_SIZE
hex
default 0x0
config XIP_ROM_BASE
hex
default 0xfffe0000
config XIP_ROM_SIZE
hex
default 0x20000
config LB_CKS_RANGE_START
int
default 49
config LB_CKS_RANGE_END
int
default 125
config LB_CKS_LOC
int
default 126
config LOGICAL_CPUS
bool
default y
config PCI_ROM_RUN
bool
default n
config HEAP_SIZE
hex
default 0x4000
config COREBOOT_V2
bool
default y
config COREBOOT_V4
bool
default y
config DEBUG
bool
default n
config USE_PRINTK_IN_CAR
bool
default n
config USE_OPTION_TABLE
bool
default n
config MAX_CPUS
int
default 1
config MMCONF_SUPPORT_DEFAULT
bool
default n
config MMCONF_SUPPORT
bool
default n
config RAMTOP
hex
default 0x200000
config ATI_RAGE_XL
bool
source src/console/Kconfig
config HAVE_ACPI_RESUME
bool
default n
config ACPI_SSDTX_NUM
int
default 0
config HAVE_FALLBACK_BOOT
bool
default y
config USE_FALLBACK_IMAGE
bool
default y
config HAVE_FAILOVER_BOOT
bool
default n
config USE_FAILOVER_IMAGE
bool
default n
config HAVE_HARD_RESET
bool
default n
config HAVE_INIT_TIMER
bool
default n
config HAVE_MAINBOARD_RESOURCES
bool
default n
config HAVE_MOVNTI
bool
default y
config HAVE_OPTION_TABLE
bool
default y
help
This variable specifies whether a given board has a cmos.layout
file containing NVRAM/CMOS bit definitions.
It defaults to 'y' but can be changed to 'n' in mainboard/*/Kconfig.
config PIRQ_ROUTE
bool
default n
config HAVE_SMI_HANDLER
bool
default n
config PCI_IO_CFG_EXT
bool
default n
config IOAPIC
bool
default n
config VIDEO_MB
int
config USE_WATCHDOG_ON_BOOT
bool
default n
config VGA
bool
default n
help
Build board-specific VGA code.
config GFXUMA
bool
help
Enable Unified Memory Architecture for graphics.
# TODO
# menu "Drivers"
#
# endmenu
config HAVE_ACPI_TABLES
bool
help
This variable specifies whether a given board has ACPI table support.
It is usually set in mainboard/*/Kconfig.
Whether or not the ACPI tables are actually generated by coreboot
is configurable by the user via GENERATE_ACPI_TABLES.
config HAVE_MP_TABLE
bool
help
This variable specifies whether a given board has MP table support.
It is usually set in mainboard/*/Kconfig.
Whether or not the MP table is actually generated by coreboot
is configurable by the user via GENERATE_MP_TABLE.
config HAVE_PIRQ_TABLE
bool
help
This variable specifies whether a given board has PIRQ table support.
It is usually set in mainboard/*/Kconfig.
Whether or not the PIRQ table is actually generated by coreboot
is configurable by the user via GENERATE_PIRQ_TABLE.
config HAVE_HIGH_TABLES
bool
menu "System tables"
config HAVE_LOW_TABLES
bool
default y
config WRITE_HIGH_TABLES
bool "Write 'high' tables to avoid being overwritten in F segment"
depends on HAVE_HIGH_TABLES
default y
config MULTIBOOT
bool "Generate Multiboot tables (for GRUB2)"
default n
config GENERATE_ACPI_TABLES
depends on HAVE_ACPI_TABLES
bool "Generate ACPI tables"
default y
help
Generate ACPI tables for this board.
If unsure, say Y.
config GENERATE_MP_TABLE
depends on HAVE_MP_TABLE
bool "Generate an MP table"
default y
help
Generate an MP table (conforming to the Intel MultiProcessor
specification 1.4) for this board.
If unsure, say Y.
config GENERATE_PIRQ_TABLE
depends on HAVE_PIRQ_TABLE
bool "Generate a PIRQ table"
default y
help
Generate a PIRQ table for this board.
If unsure, say Y.
endmenu
menu "Payload"
choice
prompt "Add a payload"
default PAYLOAD_NONE
config PAYLOAD_NONE
bool "None"
help
Select this option if you want to create an "empty" coreboot
ROM image for a certain mainboard, i.e. a coreboot ROM image
which does not yet contain a payload.
For such an image to be useful, you have to use 'cbfstool'
to add a payload to the ROM image later.
config PAYLOAD_ELF
bool "An ELF executable payload"
help
Select this option if you have a payload image (an ELF file)
which coreboot should run as soon as the basic hardware
initialization is completed.
You will be able to specify the location and file name of the
payload image later.
endchoice
config FALLBACK_PAYLOAD_FILE
string "Payload path and filename"
depends on PAYLOAD_ELF
default "payload.elf"
help
The path and filename of the ELF executable file to use as payload.
# TODO: Defined if no payload? Breaks build?
config COMPRESSED_PAYLOAD_LZMA
bool "Use LZMA compression for payloads"
default y
depends on PAYLOAD_ELF
help
In order to reduce the size payloads take up in the ROM chip
coreboot can compress them using the LZMA algorithm.
config COMPRESSED_PAYLOAD_NRV2B
bool
default n
endmenu
menu "VGA BIOS"
config VGA_BIOS
bool "Add a VGA BIOS image"
help
Select this option if you have a VGA BIOS image that you would
like to add to your ROM.
You will be able to specify the location and file name of the
image later.
config FALLBACK_VGA_BIOS_FILE
string "VGA BIOS path and filename"
depends on VGA_BIOS
default "vgabios.bin"
help
The path and filename of the file to use as VGA BIOS.
config FALLBACK_VGA_BIOS_ID
string "VGA BIOS ID"
depends on VGA_BIOS
default "1106,3230"
help
The comma-separated PCI vendor and device ID that would associate
your VGA BIOS to your video card.
Example: 1106,3230
In the above example 1106 is the PCI vendor ID (in hex, but without
the "0x" prefix) and 3230 specifies the PCI device ID of the
video card (also in hex, without "0x" prefix).
endmenu
menu "Debugging"
# TODO: Better help text and detailed instructions.
config GDB_STUB
bool "GDB debugging support"
default y
help
If enabled, you will be able to set breakpoints for gdb debugging.
See src/arch/i386/lib/c_start.S for details.
endmenu
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