summaryrefslogtreecommitdiff
path: root/src/arch/ppc/lib/pci_dev.c
blob: adb047e3fe6ce43f58c21d92bf5160e43eb6b3e8 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
#include <arch/io.h>
#include <arch/pciconf.h>

/*
 * Direct access to PCI hardware...
 */

uint8_t pci_ppc_read_config8(unsigned char bus, int devfn, int where)
{
	uint8_t res;

	out_le32((unsigned *)PCIC0_CFGADDR, CONFIG_CMD(bus, devfn, where));
	res = in_8((unsigned char *)PCIC0_CFGDATA + (where & 3));
	return res;
}

uint16_t pci_ppc_read_config16(unsigned char bus, int devfn, int where)
{
	uint16_t res;

	out_le32((unsigned *)PCIC0_CFGADDR, CONFIG_CMD(bus, devfn, where));
	res = in_le16((unsigned short *)PCIC0_CFGDATA + (where & 2));
	return res;
}

uint32_t pci_ppc_read_config32(unsigned char bus, int devfn, int where)
{
	uint32_t res;

	out_le32((unsigned *)PCIC0_CFGADDR, CONFIG_CMD(bus, devfn, where));
	res = in_le32((unsigned *)PCIC0_CFGDATA);
	return res;
}

int pci_ppc_write_config8(unsigned char bus, int devfn, int where, uint8_t data)
{
	out_le32((unsigned *)PCIC0_CFGADDR, CONFIG_CMD(bus, devfn, where));
	out_8((unsigned char *)PCIC0_CFGDATA + (where & 3), data);
	return 0;
}

int pci_ppc_write_config16(unsigned char bus, int devfn, int where, uint16_t data)
{
	out_le32((unsigned *)PCIC0_CFGADDR, CONFIG_CMD(bus, devfn, where));
	out_le16((unsigned short *)PCIC0_CFGDATA + (where & 2), data);
	return 0;
}

int pci_ppc_write_config32(unsigned char bus, int devfn, int where, uint32_t data)
{
	out_le32((unsigned *)PCIC0_CFGADDR, CONFIG_CMD(bus, devfn, where));
	out_le32((unsigned *)PCIC0_CFGDATA, data);
	return 0;
}