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config ARCH_RISCV_RV64
	bool
	select ARCH_RISCV

config ARCH_RISCV_RV32
	bool
	select ARCH_RISCV

config ARCH_RISCV
	bool

if ARCH_RISCV

config RISCV_ARCH
	string

config RISCV_ABI
	string

config RISCV_CODEMODEL
	string

config ARCH_RISCV_M_DISABLED
	bool

config ARCH_RISCV_M
	# Whether a SOC implements M mode.
	# M mode is the most privileged mode, it is
	# the equivalent in some ways of x86 SMM mode
	# save that in M mode it is impossible to turn
	# on paging.
	# While the spec requires it, there is at least
	# one implementation that will not have it due
	# to security concerns.
	bool
	default y if ARCH_RISCV && !ARCH_RISCV_M_DISABLED
	default n

config ARCH_RISCV_S
	# S (supervisor) mode is for kernels. It is optional.
	bool
	default n

config RISCV_HAS_OPENSBI
	def_bool n

config RISCV_OPENSBI
	bool "Use OpenSBI to hand over control to payload"
	depends on ARCH_RISCV_M && ARCH_RISCV_S
	depends on RISCV_HAS_OPENSBI
	default n
	help
	  Load OpenSBI after payload has been loaded and use it to
	  provide the SBI and to handover control to payload.

config OPENSBI_PLATFORM
	string
	depends on RISCV_HAS_OPENSBI
	help
	  The OpenSBI platform to build for.

config OPENSBI_TEXT_START
	hex
	depends on RISCV_HAS_OPENSBI
	help
	  The linking address used to build opensbi.

config ARCH_RISCV_U
	# U (user) mode is for programs.
	bool
	default n

config ARCH_RISCV_PMP
	bool
	default n

config ARCH_BOOTBLOCK_RISCV
	bool
	default n
	select C_ENVIRONMENT_BOOTBLOCK

config ARCH_VERSTAGE_RISCV
	bool
	default n

config ARCH_ROMSTAGE_RISCV
	bool
	default n

config ARCH_RAMSTAGE_RISCV
	bool
	default n
	select RAMSTAGE_CBMEM_TOP_ARG

config RISCV_USE_ARCH_TIMER
	bool
	default n

config RISCV_WORKING_HARTID
	int

endif # if ARCH_RISCV