summaryrefslogtreecommitdiff
path: root/src/cpu/amd/agesa/family15rl/Kconfig
blob: 495a8846b807c4af0e7e4303598cad5019ded476 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
#
# This file is part of the coreboot project.
#
# Copyright (C) 2012 Advanced Micro Devices, Inc.
# Copyright (C) 2014 Edward O'Callaghan <eocallaghan@alterapraxis.com>
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; version 2 of the License.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
#

config CPU_AMD_AGESA_FAMILY15_RL
	bool
	select PCI_IO_CFG_EXT
	select X86_AMD_FIXED_MTRRS

if CPU_AMD_AGESA_FAMILY15_RL

config CPU_ADDR_BITS
	int
	default 48

config CPU_SOCKET_TYPE
	hex
	default 0x10

# DDR2 and REG
config DIMM_SUPPORT
	hex
	default 0x0104

config EXT_RT_TBL_SUPPORT
	bool
	default n

config CBB
	hex
	default 0x0

config CDB
	hex
	default 0x18

config XIP_ROM_SIZE
	hex
	default 0x100000

config HIGH_SCRATCH_MEMORY_SIZE
	hex
	# Assume the maximum size of stack as (0xA0000 - 0x30000 + 0x1000)
	default 0xA1000

endif # CPU_AMD_AGESA_FAMILY15_RL