summaryrefslogtreecommitdiff
path: root/src/cpu/armltd/cortex-a9/cache.c
blob: 4f440ec4e90b008390adc48848c55c10157644f0 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
/*
 * Copyright (C) 2013 Google, Inc.
 *
 * This software is licensed under the terms of the GNU General Public
 * License version 2, as published by the Free Software Foundation, and
 * may be copied, distributed, and modified under those terms.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#include <common.h>
#include <armv7.h>

/*
 * Sets L2 cache related parameters before enabling data cache
 */
void v7_outer_cache_enable(void)
{
}

/* stubs so we don't need weak symbols in cache_v7.c */
void v7_outer_cache_disable(void)
{
}

void v7_outer_cache_flush_all(void)
{
}

void v7_outer_cache_inval_all(void)
{
}

void v7_outer_cache_flush_range(u32 start, u32 end)
{
}

void v7_outer_cache_inval_range(u32 start, u32 end)
{
}