index
:
coreboot
2560p
820g2
autoport-hsw
broadwell_refcode
e6230
e7240_bdw
haswell-mrc
hp820g1
hp9480m
mec1322
Some coreboot project code with my work
vimacs
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
src
/
cpu
/
intel
/
car
Mode
Name
Size
-rw-r--r--
cache_as_ram.inc
8555
log
plain
-rw-r--r--
cache_as_ram_ht.inc
9034
log
plain
-rw-r--r--
romstage.c
152
log
plain
