summaryrefslogtreecommitdiff
path: root/src/cpu/intel/haswell/Kconfig
blob: 0d3d132006827fc3f69502580134c81f41eede4a (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40

config CPU_INTEL_HASWELL
	bool

if CPU_INTEL_HASWELL

config CPU_SPECIFIC_OPTIONS
	def_bool y
	select ARCH_ALL_STAGES_X86_32
	select BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES
	select MMX
	select SSE2
	select UDELAY_TSC
	select TSC_MONOTONIC_TIMER
	select SUPPORT_CPU_UCODE_IN_CBFS
	#select AP_IN_SIPI_WAIT
	select TSC_SYNC_MFENCE
	select CPU_INTEL_FIRMWARE_INTERFACE_TABLE
	select PARALLEL_MP
	select CPU_INTEL_COMMON
	select CPU_INTEL_COMMON_TIMEBASE
	select HAVE_ASAN_IN_ROMSTAGE
	select CPU_INTEL_COMMON_VOLTAGE

config SMM_TSEG_SIZE
	hex
	default 0x800000

config IED_REGION_SIZE
	hex
	default 0x400000

config SMM_RESERVED_SIZE
	hex
	default 0x100000

config MAX_CPUS
	int
	default 8
endif