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##
## This file is part of the coreboot project.
##
## SPDX-License-Identifier: GPL-2.0-only
config CPU_INTEL_SLOT_1
bool
if CPU_INTEL_SLOT_1
config SLOT_SPECIFIC_OPTIONS # dummy
def_bool y
select CPU_INTEL_MODEL_65X
select CPU_INTEL_MODEL_67X
select CPU_INTEL_MODEL_68X
select CPU_INTEL_MODEL_6BX
select CPU_INTEL_MODEL_6XX
select NO_SMM
select UDELAY_TSC
select TSC_MONOTONIC_TIMER
select UNKNOWN_TSC_RATE
select SETUP_XIP_CACHE
config DCACHE_RAM_BASE
hex
default 0xfefc0000
config DCACHE_RAM_SIZE
hex
default 0x02000
config DCACHE_BSP_STACK_SIZE
hex
default 0x1000
config C_ENV_BOOTBLOCK_SIZE
hex
default 0x2000
endif
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