index
:
coreboot
2560p
820g2
autoport-hsw
broadwell_refcode
e6230
e7240_bdw
haswell-mrc
hp820g1
hp9480m
mec1322
Some coreboot project code with my work
vimacs
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
src
/
cpu
/
x86
/
sse
Mode
Name
Size
-rw-r--r--
Config.lb
0
log
plain
-rw-r--r--
disable_sse.inc
344
log
plain
-rw-r--r--
enable_sse.inc
200
log
plain