1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
|
/* SPDX-License-Identifier: GPL-2.0-only */
#include <device/mmio.h>
#include <boot/coreboot_tables.h>
#include <console/uart.h>
#include <device/device.h>
#include <delay.h>
#include <stdint.h>
#include "uart8250reg.h"
/* Should support 8250, 16450, 16550, 16550A type UARTs */
/* Expected character delay at 1200bps is 9ms for a working UART
* and no flow-control. Assume UART as stuck if shift register
* or FIFO takes more than 50ms per character to appear empty.
*/
#define SINGLE_CHAR_TIMEOUT (50 * 1000)
#define FIFO_TIMEOUT (16 * SINGLE_CHAR_TIMEOUT)
#if CONFIG(DRIVERS_UART_8250MEM_32)
static uint8_t uart8250_read(void *base, uint8_t reg)
{
return read32(base + 4 * reg) & 0xff;
}
static void uart8250_write(void *base, uint8_t reg, uint8_t data)
{
write32(base + 4 * reg, data);
}
#else
static uint8_t uart8250_read(void *base, uint8_t reg)
{
return read8(base + reg);
}
static void uart8250_write(void *base, uint8_t reg, uint8_t data)
{
write8(base + reg, data);
}
#endif
static int uart8250_mem_can_tx_byte(void *base)
{
return uart8250_read(base, UART8250_LSR) & UART8250_LSR_THRE;
}
static void uart8250_mem_tx_byte(void *base, unsigned char data)
{
unsigned long int i = SINGLE_CHAR_TIMEOUT;
while (i-- && !uart8250_mem_can_tx_byte(base))
udelay(1);
uart8250_write(base, UART8250_TBR, data);
}
static void uart8250_mem_tx_flush(void *base)
{
unsigned long int i = FIFO_TIMEOUT;
while (i-- && !(uart8250_read(base, UART8250_LSR) & UART8250_LSR_TEMT))
udelay(1);
}
static int uart8250_mem_can_rx_byte(void *base)
{
return uart8250_read(base, UART8250_LSR) & UART8250_LSR_DR;
}
static unsigned char uart8250_mem_rx_byte(void *base)
{
unsigned long int i = SINGLE_CHAR_TIMEOUT;
while (i && !uart8250_mem_can_rx_byte(base)) {
udelay(1);
i--;
}
if (i)
return uart8250_read(base, UART8250_RBR);
else
return 0x0;
}
static void uart8250_mem_init(void *base, unsigned int divisor)
{
/* Disable interrupts */
uart8250_write(base, UART8250_IER, 0x0);
/* Enable FIFOs */
uart8250_write(base, UART8250_FCR, UART8250_FCR_FIFO_EN);
/* Assert DTR and RTS so the other end is happy */
uart8250_write(base, UART8250_MCR, UART8250_MCR_DTR | UART8250_MCR_RTS);
/* DLAB on */
uart8250_write(base, UART8250_LCR, UART8250_LCR_DLAB | CONFIG_TTYS0_LCS);
uart8250_write(base, UART8250_DLL, divisor & 0xFF);
uart8250_write(base, UART8250_DLM, (divisor >> 8) & 0xFF);
/* Set to 3 for 8N1 */
uart8250_write(base, UART8250_LCR, CONFIG_TTYS0_LCS);
}
void uart_init(unsigned int idx)
{
void *base = uart_platform_baseptr(idx);
if (!base)
return;
unsigned int div;
div = uart_baudrate_divisor(get_uart_baudrate(),
uart_platform_refclk(), uart_input_clock_divider());
uart8250_mem_init(base, div);
}
void uart_tx_byte(unsigned int idx, unsigned char data)
{
void *base = uart_platform_baseptr(idx);
if (!base)
return;
uart8250_mem_tx_byte(base, data);
}
unsigned char uart_rx_byte(unsigned int idx)
{
void *base = uart_platform_baseptr(idx);
if (!base)
return 0xff;
return uart8250_mem_rx_byte(base);
}
void uart_tx_flush(unsigned int idx)
{
void *base = uart_platform_baseptr(idx);
if (!base)
return;
uart8250_mem_tx_flush(base);
}
void uart_fill_lb(void *data)
{
struct lb_serial serial;
serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED;
serial.baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE);
if (!serial.baseaddr)
return;
serial.baud = get_uart_baudrate();
if (CONFIG(DRIVERS_UART_8250MEM_32))
serial.regwidth = sizeof(uint32_t);
else
serial.regwidth = sizeof(uint8_t);
serial.input_hertz = uart_platform_refclk();
serial.uart_pci_addr = CONFIG_UART_PCI_ADDR;
lb_add_serial(&serial, data);
lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);
}
|
