summaryrefslogtreecommitdiff
path: root/src/mainboard/Iwill/DK8X/failover.c
blob: bd9c17020ec077595b157cc5275c6cff88a6b4f2 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
#define ASSEMBLY 1
#include <stdint.h>
#include <device/pci_def.h>
#include <device/pci_ids.h>
#include <arch/io.h>
#include "arch/romcc_io.h"
#include "pc80/mc146818rtc_early.c"
#include "southbridge/amd/amd8111/amd8111_enable_rom.c"
#include "northbridge/amd/amdk8/early_ht.c"
#include "cpu/p6/boot_cpu.c"
#include "northbridge/amd/amdk8/reset_test.c"

static void main(void)
{
	/* Nothing special needs to be done to find bus 0 */
	/* Allow the HT devices to be found */
	enumerate_ht_chain(0);

	/* Setup the 8111 */
	amd8111_enable_rom();

	/* Is this a cpu reset? */
	if (cpu_init_detected()) {
		if (last_boot_normal()) {
			asm("jmp __normal_image");
		} else {
			asm("jmp __cpu_reset");
		}
	}
	/* Is this a deliberate reset by the bios */
	else if (bios_reset_detected() && last_boot_normal()) {
		asm("jmp __normal_image");
	}
	/* Is this a secondary cpu? */
	else if (!boot_cpu() && last_boot_normal()) {
		asm("jmp __normal_image");
	}
	/* This is the primary cpu how should I boot? */
	else if (do_normal_boot()) {
		asm("jmp __normal_image");
	}
}