summaryrefslogtreecommitdiff
path: root/src/mainboard/amd/olivehill/acpi/AmdImc.asl
blob: 9d144c43d9960ebca0f5b7d22395007a57ca22d1 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
/*
 * This file is part of the coreboot project.
 *
 * Copyright (C) 2012 Advanced Micro Devices, Inc.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; version 2 of the License.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

//BTDC Due to IMC Fan, ACPI control codes
OperationRegion(IMIO, SystemIO, 0x3E, 0x02)
Field(IMIO , ByteAcc, NoLock, Preserve) {
	IMCX,8,
	IMCA,8
}

IndexField(IMCX, IMCA, ByteAcc, NoLock, Preserve) {
	Offset(0x80),
	MSTI, 8,
	MITS, 8,
	MRG0, 8,
	MRG1, 8,
	MRG2, 8,
	MRG3, 8,
}

Method(WACK, 0)
{
	Store(0, Local0)
	While (LNotEqual(Local0, 0xFA)) {
		Store(MRG0, Local0)
		Sleep(10)
	}
}

//Init
Method (ITZE, 0)
{
	Store(0, MRG0)
	Store(0xB5, MRG1)
	Store(0, MRG2)
	Store(0x96, MSTI)
	WACK()

	Store(0, MRG0)
	Store(0, MRG1)
	Store(0, MRG2)
	Store(0x80, MSTI)
	WACK()

	Or(MRG2, 0x01, Local0)

	Store(0, MRG0)
	Store(0, MRG1)
	Store(Local0, MRG2)
	Store(0x81, MSTI)
	WACK()
}