summaryrefslogtreecommitdiff
path: root/src/mainboard/amd/serengeti_cheetah_fam10/Kconfig
blob: feecdec4ef005e3d52982f375d4d7c6dcea986ce (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
if BOARD_AMD_SERENGETI_CHEETAH_FAM10

config BOARD_SPECIFIC_OPTIONS # dummy
	def_bool y
	select ARCH_X86
	select CPU_AMD_SOCKET_F_1207
	select DIMM_DDR2
	select DIMM_REGISTERED
	select NORTHBRIDGE_AMD_AMDFAM10
	select SOUTHBRIDGE_AMD_AMD8111
	select SOUTHBRIDGE_AMD_AMD8132
	select SUPERIO_WINBOND_W83627HF
	select BOARD_HAS_FADT
	select HAVE_BUS_CONFIG
	select HAVE_OPTION_TABLE
	select HAVE_PIRQ_TABLE
	select HAVE_MP_TABLE
	select HAVE_HARD_RESET
	select SB_HT_CHAIN_UNITID_OFFSET_ONLY
	select SERIAL_CPU_INIT
	select AMDMCT
	select HAVE_ACPI_TABLES
	select BOARD_ROMSIZE_KB_1024
	select RAMINIT_SYSINFO
	select ENABLE_APIC_EXT_ID
	select LIFT_BSP_APIC_ID
	select QRANK_DIMM_SUPPORT

config MAINBOARD_DIR
	string
	default amd/serengeti_cheetah_fam10

config APIC_ID_OFFSET
	hex
	default 0x0

config MAINBOARD_PART_NUMBER
	string
	default "Serengeti Cheetah (Fam10)"

# 6 * MAX_PHYSICAL_CPUS
config MAX_CPUS
	int
	default 48

config MAX_PHYSICAL_CPUS
	int
	default 8

config MEM_TRAIN_SEQ
	int
	default 2

config SB_HT_CHAIN_ON_BUS0
	int
	default 2

config HT_CHAIN_END_UNITID_BASE
	hex
	default 0x6

config HT_CHAIN_UNITID_BASE
	hex
	default 0xa

config IRQ_SLOT_COUNT
	int
	default 11

config AMD_UCODE_PATCH_FILE
	string
	default "mc_patch_01000095.h"

config RAMTOP
	hex
	default 0x1000000

config HEAP_SIZE
	hex
	default 0xc0000

config ACPI_SSDTX_NUM
	int
	default 5

config RAMBASE
	hex
	default 0x200000

endif # BOARD_AMD_SERENGETI_CHEETAH_FAM10