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/*
* This file is part of the coreboot project.
*
* Copyright (C) 2008-2009 coresystems GmbH
* Copyright (C) 2014 Vladimir Serbinenko
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; version 2 of
* the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <cpu/x86/smm.h>
#include <southbridge/intel/bd82x6x/pch.h>
#include <stdint.h>
#include <device/pci_ops.h>
#include <ec/dell/mec5055/mec5055.h>
int mainboard_smi_apmc(u8 data)
{
switch (data) {
case APM_CNT_ACPI_ENABLE:
pci_write_config32(PCH_LPC_DEV, LPC_GEN2_DEC, 0x007c0901);
mec5055_ec_acpi_enable();
pci_write_config32(PCH_LPC_DEV, LPC_GEN2_DEC, 0x005c0921);
default:
break;
}
return 0;
}
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