blob: 3275aa297db0c45205f58be3c5edaca5cd18efe7 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
|
##
## Config file for the Embedded Planet EP405PC Computing Engine
##
uses PCIC0_CFGADDR
uses PCIC0_CFGDATA
uses ISA_IO_BASE
uses ISA_MEM_BASE
uses TTYS0_BASE
uses _IO_BASE
uses CPU_OPT
uses CROSS_COMPILE
uses HAVE_OPTION_TABLE
uses CONFIG_COMPRESS
uses CONFIG_CHIP_CONFIGURE
uses DEFAULT_CONSOLE_LOGLEVEL
uses CONFIG_USE_INIT
uses CONFIG_CONSOLE_SERIAL8250
uses TTYS0_BAUD TTYS0_DIV
uses NO_POST
uses CONFIG_IDE
uses CONFIG_FS_STREAM
uses CONFIG_FS_EXT2
uses CONFIG_FS_ISO9660
uses CONFIG_FS_FAT
uses AUTOBOOT_CMDLINE
uses CONFIG_SYS_CLK_FREQ
uses IDE_BOOT_DRIVE
#uses IDE_SWAB
uses IDE_OFFSET
uses ROM_SIZE
uses _RESET
uses _EXCEPTION_VECTORS
uses _ROMBASE
uses _ROMSTART
uses _RAMBASE
#uses _RAMSTART
uses EMBEDDED_RAM_SIZE
uses STACK_SIZE HEAP_SIZE
uses MAINBOARD
uses MAINBOARD_VENDOR
uses MAINBOARD_PART_NUMBER
uses LINUXBIOS_EXTRA_VERSION
uses CROSS_COMPILE
uses CC
uses HOSTCC
uses OBJCOPY
##
## Set PCI configuration register addresses
##
default PCIC0_CFGADDR=0xeec00000
default PCIC0_CFGDATA=0xeec00004
##
## Set PCI/ISA I/O and memory base address
##
default ISA_IO_BASE=0xe8000000
default ISA_MEM_BASE=0x80000000
default _IO_BASE=ISA_IO_BASE
##
## HACK ALERT: the UART0 registers are not in the PCI I/O address space
## but both IDE and UART use the same routines for I/O (inb/outb). To get
## around this we set TTYSO_BASE to the difference between the two.
##
default TTYS0_BASE=0xef600300-ISA_IO_BASE
## Enable PPC405 instructions
default CPU_OPT="-mcpu=405"
#default CPU_OPT=""
## Use stage 1 initialization code
default CONFIG_USE_INIT=1
## Use chip configuration
default CONFIG_CHIP_CONFIGURE=1
## We don't use compressed image
default CONFIG_COMPRESS=0
## Turn off POST codes
default NO_POST=1
## Enable serial console
default DEFAULT_CONSOLE_LOGLEVEL=8
default CONFIG_CONSOLE_SERIAL8250=1
# Divisor of 69 == 9600 baud due to weird clocking
default TTYS0_DIV=69
default TTYS0_BAUD=9600
## Boot linux from IDE
default CONFIG_IDE=1
default CONFIG_FS_STREAM=1
default CONFIG_FS_EXT2=1
default CONFIG_FS_ISO9660=1
default CONFIG_FS_FAT=1
default AUTOBOOT_CMDLINE="hda1:/vmlinuz"
default ROM_SIZE=1048576
## Board has fixed size RAM
default EMBEDDED_RAM_SIZE=64*1024*1024
## LinuxBIOS C code runs at this location in RAM
default _RAMBASE=0x00100000
##
## Use a 64K stack
##
default STACK_SIZE=0x10000
##
## Use a 64K heap
##
default HEAP_SIZE=0x10000
##
## System clock
##
default CONFIG_SYS_CLK_FREQ=33
##
default _ROMBASE=0xfff00000
## Reset vector address
default _RESET=0xfffffffc
## Exception vectors
default _EXCEPTION_VECTORS=_ROMBASE+0x100
## linuxBIOS ROM start address
default _ROMSTART=0xfff03000
## linuxBIOS C code runs at this location in RAM
default _RAMBASE=0x00100000
### End Options.lb
end
|
