summaryrefslogtreecommitdiff
path: root/src/mainboard/google/asurada/Kconfig
blob: 51e42a874286904d65d3ebd3754d77871bf9eab3 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
## SPDX-License-Identifier: GPL-2.0-only

# Umbrella option to be selected by variant boards.
config BOARD_GOOGLE_ASURADA_COMMON
	def_bool n

if BOARD_GOOGLE_ASURADA_COMMON

config VBOOT
	select EC_GOOGLE_CHROMEEC_SWITCHES
	select VBOOT_VBNV_FLASH

config BOARD_SPECIFIC_OPTIONS
	def_bool y
	select SOC_MEDIATEK_MT8192
	select BOARD_ROMSIZE_KB_8192
	select MAINBOARD_HAS_CHROMEOS
	select CHROMEOS_USE_EC_WATCHDOG_FLAG if CHROMEOS
	select COMMON_CBFS_SPI_WRAPPER
	select SPI_FLASH
	select SPI_FLASH_INCLUDE_ALL_DRIVERS
	select EC_GOOGLE_CHROMEEC
	select EC_GOOGLE_CHROMEEC_BOARDID
	select EC_GOOGLE_CHROMEEC_SPI
	select MAINBOARD_HAS_SPI_TPM_CR50 if VBOOT
	select MAINBOARD_HAS_TPM2 if VBOOT
	select MAINBOARD_HAS_NATIVE_VGA_INIT
	select MAINBOARD_FORCE_NATIVE_VGA_INIT
	select HAVE_LINEAR_FRAMEBUFFER

config MAINBOARD_DIR
	string
	default "google/asurada"

config MAINBOARD_PART_NUMBER
	string
	default "Asurada" if BOARD_GOOGLE_ASURADA

config DRIVER_TPM_SPI_BUS
	hex
	default 0x0

# On MT8192 the SPI flash is actually using a SPI-NOR controller with its own bus.
# The number here should be a virtual value as (SPI_BUS_NUMBER + 1).
config BOOT_DEVICE_SPI_FLASH_BUS
	int
	default 9

config EC_GOOGLE_CHROMEEC_SPI_BUS
	hex
	default 0x2

endif