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/*
* This file is part of the coreboot project.
*
* Copyright (C) 2014 Google Inc.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; version 2 of
* the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <variant/onboard.h>
Scope (\_SB)
{
Device (LID0)
{
Name(_HID, EisaId("PNP0C0D"))
Method(_LID, 0)
{
Store (\_SB.PCI0.LPCB.EC0.LIDS, \LIDS)
Return (\LIDS)
}
// There is no GPIO for LID, the EC pulses WAKE# pin instead.
// There is no GPE for WAKE#, so fake it with PCI_EXP_WAKE
Name (_PRW, Package(){ 0x69, 5 }) // PCI_EXP
}
Device (PWRB)
{
Name(_HID, EisaId("PNP0C0C"))
}
}
/*
* LPC Trusted Platform Module
*/
Scope (\_SB.PCI0.LPCB)
{
#include <drivers/pc80/tpm/acpi/tpm.asl>
}
Scope (\_SB.PCI0.RP01)
{
Device (WLAN)
{
Name (_ADR, 0x00000000)
Name (_PRW, Package() { BOARD_WLAN_WAKE_GPIO, 3 })
Method (_DSW, 3, NotSerialized)
{
Store (BOARD_WLAN_WAKE_GPIO, Local0)
If (LEqual (Arg0, 1)) {
// Enable GPIO as wake source
\_SB.PCI0.LPCB.GPIO.GWAK (Local0)
}
}
}
}
#include <variant/acpi/mainboard.asl>
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