blob: e0444059bf0dcdaf34b9cde5dc9d34605b684ad6 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
|
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2007-2009 coresystems GmbH
* Copyright (C) 2013 Google Inc.
* Copyright (C) 2015 Intel Corporation.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <arch/acpi.h>
#include <console/console.h>
#include <device/device.h>
#include <stdlib.h>
#include <soc/nhlt.h>
#include <vendorcode/google/chromeos/chromeos.h>
#include "ec.h"
static void mainboard_init(device_t dev)
{
mainboard_ec_init();
}
static unsigned long mainboard_write_acpi_tables(
device_t device, unsigned long current, acpi_rsdp_t *rsdp)
{
uintptr_t start_addr;
uintptr_t end_addr;
struct nhlt *nhlt;
start_addr = current;
nhlt = nhlt_init();
if (nhlt == NULL)
return start_addr;
/* 2 Channel DMIC array. */
if (nhlt_soc_add_dmic_array(nhlt, 2))
printk(BIOS_ERR, "Couldn't add 2CH DMIC array.\n");
/* MAXIM Smart Amps for left and right. */
if (nhlt_soc_add_max98357(nhlt, AUDIO_LINK_SSP0))
printk(BIOS_ERR, "Couldn't add max98357.\n");
/* NAU88l25 Headset codec. */
if (nhlt_soc_add_nau88l25(nhlt, AUDIO_LINK_SSP1))
printk(BIOS_ERR, "Couldn't add headset codec.\n");
end_addr = nhlt_soc_serialize(nhlt, start_addr);
if (end_addr != start_addr)
acpi_add_table(rsdp, (void *)start_addr);
return end_addr;
}
/*
* mainboard_enable is executed as first thing after
* enumerate_buses().
*/
static void mainboard_enable(device_t dev)
{
dev->ops->init = mainboard_init;
dev->ops->write_acpi_tables = mainboard_write_acpi_tables;
dev->ops->acpi_inject_dsdt_generator = chromeos_dsdt_generator;
}
struct chip_operations mainboard_ops = {
.enable_dev = mainboard_enable,
};
|
