blob: 7f981b428b0d55d4fca30821d9af47fce386b1a1 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
|
##
## This file is part of the coreboot project.
##
## Copyright 2014 Rockchip Inc.
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
if BOARD_GOOGLE_VEYRON_PINKY
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
select BOARD_ID_SUPPORT
select EC_GOOGLE_CHROMEEC
select EC_GOOGLE_CHROMEEC_SPI
select EC_SOFTWARE_SYNC
select SOC_ROCKCHIP_RK3288
select MAINBOARD_DO_NATIVE_VGA_INIT
select MAINBOARD_HAS_CHROMEOS
select BOARD_ROMSIZE_KB_4096
select MAINBOARD_HAS_BOOTBLOCK_INIT
select HAVE_HARD_RESET
select RETURN_FROM_VERSTAGE
config MAINBOARD_DIR
string
default google/veyron_pinky
config MAINBOARD_PART_NUMBER
string
default "Veyron_Pinky"
config MAINBOARD_VENDOR
string
default "Google"
config EC_GOOGLE_CHROMEEC_SPI_BUS
hex
default 0
config EC_GOOGLE_CHROMEEC_SPI_WAKEUP_DELAY_US
int
default 100
config VBOOT_RAMSTAGE_INDEX
hex
default 0x3
config BOOT_MEDIA_SPI_BUS
int
default 2
config DRAM_DMA_START
hex
default 0x10000000
config DRAM_DMA_SIZE
hex
default 0x00200000
config DRAM_SIZE_MB
int
default 2048
config DRIVER_TPM_I2C_BUS
hex
default 0x1
config DRIVER_TPM_I2C_ADDR
hex
default 0x20
endif # BOARD_GOOGLE_VEYRON_PINKY
|