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##
## This file is part of the coreboot project.
##
## Copyright (C) 2015-2016 Intel Corp.
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
if BOARD_INTEL_GALILEO
config BOARD_SPECIFIC_OPTIONS
def_bool y
select BOARD_ROMSIZE_KB_8192
# select CREATE_BOARD_CHECKLIST
select ENABLE_BUILTIN_HSUART1
select HAVE_ACPI_TABLES
select SOC_INTEL_QUARK
config MAINBOARD_DIR
string
default intel/galileo
config MAINBOARD_PART_NUMBER
string
default "Galileo"
config MAINBOARD_VENDOR
string
default "Intel"
config GALILEO_GEN2
bool "Board generation: GEN1 (n) or GEN2 (y)"
default y
help
The coreboot binary will configure only one generation of the Galileo
board since coreboot can not determine the board generation at
runtime. Select which generation of the Galileo that coreboot
should initialize.
choice
prompt "FSP version"
default FSP_VERSION_2_0
config FSP_VERSION_1_1
bool "FSP 1.1"
select CREATE_BOARD_CHECKLIST
select PLATFORM_USES_FSP1_1
# select ADD_FSP_RAW_BIN
help
Use FSP 1_1 binary
config FSP_VERSION_2_0
bool "FSP 2.0"
select PLATFORM_USES_FSP2_0
select POSTCAR_STAGE
help
Use FSP 2.0 binary
endchoice
config FSP_VERSION
string
default "fsp1_1" if FSP_VERSION_1_1
default "fsp2_0" if FSP_VERSION_2_0
choice
prompt "FSP binary type"
default FSP_BUILD_TYPE_DEBUG
config FSP_BUILD_TYPE_DEBUG
bool "Debug"
help
Use the debug version of FSP
config FSP_BUILD_TYPE_RELEASE
bool "Release"
help
Use the release version of FSP
endchoice
config FSP_BUILD_TYPE
string
default "DEBUG" if FSP_BUILD_TYPE_DEBUG
default "RELEASE" if FSP_BUILD_TYPE_RELEASE
choice
prompt "FSP type"
depends on FSP_VERSION_2_0 || FSP_VERSION_1_1
default FSP_TYPE_1_1_PEI if FSP_VERSION_1_1
default FSP_TYPE_2_0_PEI if FSP_VERSION_2_0
config FSP_TYPE_1_1
bool "MemInit subroutine"
depends on FSP_VERSION_1_1
help
FSP 1.1 implemented as subroutines, no EDK-II cores
config FSP_TYPE_1_1_PEI
bool "SEC + PEI Core + MemInit PEIM"
depends on FSP_VERSION_1_1
help
FSP 1.1 implemented using SEC and PEI core
config FSP_TYPE_2_0
bool "MemInit subroutine"
depends on FSP_VERSION_2_0
help
FSP 2.0 implemented as subroutines, no EDK-II cores
config FSP_TYPE_2_0_PEI
bool "SEC + PEI Core + MemInit PEIM"
depends on FSP_VERSION_2_0
help
FSP 2.0 implemented using SEC and PEI core
endchoice
config FSP_TYPE
string
default "Fsp1_1" if FSP_TYPE_1_1
default "Fsp1_1Pei" if FSP_TYPE_1_1_PEI
default "Fsp2_0" if FSP_TYPE_2_0
default "Fsp2_0Pei" if FSP_TYPE_2_0_PEI
config FSP_DEBUG_ALL
bool "Enable all FSP debug support"
depends on FSP_VERSION_2_0 || FSP_VERSION_1_1
default y
# Enable display and verification for coreboot build tests
select BOOTBLOCK_CONSOLE
select DISPLAY_HOBS
select DISPLAY_MTRRS
select DISPLAY_SMM_MEMORY_MAP
select DISPLAY_UPD_DATA
select DISPLAY_ESRAM_LAYOUT if FSP_VERSION_2_0
select DISPLAY_FSP_CALLS_AND_STATUS if FSP_VERSION_2_0
select DISPLAY_FSP_HEADER if FSP_VERSION_2_0
select POSTCAR_CONSOLE if FSP_VERSION_2_0
select VERIFY_HOBS if FSP_VERSION_2_0
select DISPLAY_FSP_ENTRY_POINTS if FSP_VERSION_1_1
help
Turn on debug support to display HOBS, MTRRS, SMM_MEMORY_MAP, UPD_DATA
also turn on FSP 2.0 debug support for ESRAM_LAYOUT,
FSP_CALLS_AND_STATUS, FSP_HEADER, POSTCAR_CONSOLE and VERIFY_HOBS
or FSP 1.1 DISPLAY_FSP_ENTRY_POINTS
endif # BOARD_INTEL_QUARK
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