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##
## This file is part of the coreboot project.
##
## Copyright (C) 2007-2008 coresystems GmbH
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
# -----------------------------------------------------------------
entries
# -----------------------------------------------------------------
# Status Register A
# -----------------------------------------------------------------
# Status Register B
# -----------------------------------------------------------------
# Status Register C
#96 4 r 0 status_c_rsvd
#100 1 r 0 uf_flag
#101 1 r 0 af_flag
#102 1 r 0 pf_flag
#103 1 r 0 irqf_flag
# -----------------------------------------------------------------
# Status Register D
#104 7 r 0 status_d_rsvd
#111 1 r 0 valid_cmos_ram
# -----------------------------------------------------------------
# Diagnostic Status Register
#112 8 r 0 diag_rsvd1
# -----------------------------------------------------------------
0 120 r 0 reserved_memory
#120 264 r 0 unused
# -----------------------------------------------------------------
# RTC_BOOT_BYTE (coreboot hardcoded)
384 1 e 4 boot_option
388 4 r 0 reboot_bits
#390 2 r 0 unused?
# -----------------------------------------------------------------
# coreboot config options: console
392 3 e 5 baud_rate
395 4 e 6 debug_level
#399 1 r 0 unused
# coreboot config options: cpu
400 1 e 2 hyper_threading
401 3 e 12 gfx_uma_size
#404 4 r 0 unused
# coreboot config options: southbridge
408 1 e 1 nmi
409 2 e 7 power_on_after_fail
411 1 e 11 sata_mode
#412 4 r 0 unused
# coreboot config options: additional mainboard options
416 4 e 10 systemp_type
420 7 h 0 fan1_min
427 7 h 0 fan1_max
434 7 h 0 fan2_min
441 7 h 0 fan2_max
# coreboot config options: bootloader
448 64 r 0 write_protected_by_bios
512 328 s 0 boot_devices
840 8 h 0 boot_default
848 1 e 9 cmos_defaults_loaded
849 1 e 2 ethernet1
850 1 e 2 ethernet2
#851 5 r 0 unused
# coreboot config options: mainboard specific options
856 2 e 8 fan1_mode
858 2 r 0 fan1_reserved
860 2 e 8 fan2_mode
862 2 r 0 fan2_reserved
864 16 h 0 fan1_target
880 16 h 0 fan2_target
# SandyBridge MRC Scrambler Seed values
896 32 r 0 mrc_scrambler_seed
928 32 r 0 mrc_scrambler_seed_s3
960 16 r 0 mrc_scrambler_seed_chk
# coreboot config options: check sums
984 16 h 0 check_sum
#1000 24 r 0 amd_reserved
# -----------------------------------------------------------------
enumerations
#ID value text
1 0 Disable
1 1 Enable
2 0 Enable
2 1 Disable
4 0 Fallback
4 1 Normal
5 0 115200
5 1 57600
5 2 38400
5 3 19200
5 4 9600
5 5 4800
5 6 2400
5 7 1200
6 1 Emergency
6 2 Alert
6 3 Critical
6 4 Error
6 5 Warning
6 6 Notice
6 7 Info
6 8 Debug
6 9 Spew
7 0 Disable
7 1 Enable
7 2 Keep
8 0 Auto
8 1 PWM
8 2 Speed
8 3 Thermal
9 0 No
9 1 Yes
10 0 None
10 1 AMD
10 2 LM75@90
10 3 GPIO16
10 4 LM75@9e
11 0 AHCI
11 1 Compatible
12 0 32M
12 1 64M
12 2 96M
12 3 128M
12 4 160M
12 5 192M
12 6 224M
# -----------------------------------------------------------------
checksums
checksum 392 895 984
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