1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
|
chip northbridge/intel/sandybridge
register "gfx.ndid" = "3"
register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
# Enable DisplayPort Hotplug with 6ms pulse
register "gpu_dp_d_hotplug" = "0x06"
# Enable Panel as LVDS and configure power delays
register "gpu_panel_port_select" = "0" # LVDS
register "gpu_panel_power_cycle_delay" = "6" # T7: 500ms
register "gpu_panel_power_up_delay" = "100" # T1+T2: 10ms
register "gpu_panel_power_down_delay" = "100" # T5+T6: 10ms
register "gpu_panel_power_backlight_on_delay" = "2100" # T3: 210ms
register "gpu_panel_power_backlight_off_delay" = "2100" # T4: 210ms
register "gfx.use_spread_spectrum_clock" = "1"
register "gfx.link_frequency_270_mhz" = "1"
register "gpu_cpu_backlight" = "0x1155"
register "gpu_pch_backlight" = "0x11551155"
device cpu_cluster 0 on
chip cpu/intel/model_206ax
# Magic APIC ID to locate this chip
device lapic 0x0 on end
device lapic 0xacac off end
register "c1_acpower" = "1" # ACPI(C1) = MWAIT(C1)
register "c2_acpower" = "3" # ACPI(C2) = MWAIT(C3)
register "c3_acpower" = "5" # ACPI(C3) = MWAIT(C7)
register "c1_battery" = "1" # ACPI(C1) = MWAIT(C1)
register "c2_battery" = "3" # ACPI(C2) = MWAIT(C3)
register "c3_battery" = "5" # ACPI(C3) = MWAIT(C7)
end
end
register "pci_mmio_size" = "2048"
device domain 0 on
device pci 00.0 on
subsystemid 0x17aa 0x21fb
end # host bridge
device pci 01.0 on end # PCIe Bridge for discrete graphics
device pci 02.0 on
subsystemid 0x17aa 0x21fb
end # Integrated Graphics Controller
chip southbridge/intel/bd82x6x # Intel Series 7 Panther Point PCH
# GPI routing
# 0 No effect (default)
# 1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set)
# 2 SCI (if corresponding GPIO_EN bit is also set)
register "alt_gp_smi_en" = "0x0000"
register "gpi1_routing" = "2"
register "gpi13_routing" = "2"
# Enable SATA ports 0 (HDD bay) & 1 (ODD bay) & 2 (mSATA) & 4 (dock)
register "sata_port_map" = "0x17"
# Set max SATA speed to 6.0 Gb/s
register "sata_interface_speed_support" = "0x3"
register "gen1_dec" = "0x7c1601"
register "gen2_dec" = "0x0c15e1"
register "gen4_dec" = "0x0c06a1"
register "pcie_hotplug_map" = "{ 0, 0, 1, 0, 0, 0, 0, 0 }"
# Wire port 4 (wwan usb) to ehci for it lacks superspeed components
register "xhci_switchable_ports" = "0x7"
register "superspeed_capable_ports" = "0xf"
register "xhci_overcurrent_mapping" = "0x4000201"
# Enable zero-based linear PCIe root port functions
register "pcie_port_coalesce" = "1"
register "c2_latency" = "101" # c2 not supported
register "p_cnt_throttling_supported" = "1"
register "docking_supported" = "1"
register "spi_uvscc" = "0x2005"
register "spi_lvscc" = "0x2005"
device pci 14.0 on
subsystemid 0x17aa 0x21fb
end # USB 3.0 Controller
device pci 16.0 off end # Management Engine Interface 1
device pci 16.1 off end # Management Engine Interface 2
device pci 16.2 off end # Management Engine IDE-R
device pci 16.3 off end # Management Engine KT
device pci 19.0 on
subsystemid 0x17aa 0x21f3
end # Intel Gigabit Ethernet
device pci 1a.0 on
subsystemid 0x17aa 0x21fb
end # USB Enhanced Host Controller #2
device pci 1b.0 on
subsystemid 0x17aa 0x21fb
end # High Definition Audio Controller
device pci 1c.0 off end # PCIe Port #1
device pci 1c.1 on
subsystemid 0x17aa 0x21fb
end # PCIe Port #2 Integrated Wireless LAN
device pci 1c.2 on
subsystemid 0x17aa 0x21fb
end # PCIe Port #3 ExpressCard
device pci 1c.3 off end # PCIe Port #4
device pci 1c.4 off end # PCIe Port #5
device pci 1c.5 off end # PCIe Port #6 Intel Gigabit Ethernet PHY (not PCIe)
device pci 1c.6 off end # PCIe Port #7
device pci 1c.7 off end # PCIe Port #8
device pci 1d.0 on
subsystemid 0x17aa 0x21fb
end # USB Enhanced Host Controller #1
device pci 1e.0 off end # PCI bridge
device pci 1f.0 on
subsystemid 0x17aa 0x21fb
chip ec/lenovo/pmh7
device pnp ff.1 on # dummy
end
register "backlight_enable" = "0x01"
register "dock_event_enable" = "0x01"
end
chip drivers/pc80/tpm
device pnp 0c31.0 on end
end
chip ec/lenovo/h8
device pnp ff.2 on # dummy
io 0x60 = 0x62
io 0x62 = 0x66
io 0x64 = 0x1600
io 0x66 = 0x1604
end
register "config0" = "0xa7"
register "config1" = "0x05"
register "config2" = "0xa0"
register "config3" = "0xe2"
register "has_keyboard_backlight" = "1"
register "beepmask0" = "0x00"
register "beepmask1" = "0x86"
register "has_power_management_beeps" = "0"
register "event2_enable" = "0xff"
register "event3_enable" = "0xff"
register "event4_enable" = "0xd0"
register "event5_enable" = "0x3c"
register "event6_enable" = "0x00"
register "event7_enable" = "0x01"
register "event8_enable" = "0x7b"
register "event9_enable" = "0xff"
register "eventa_enable" = "0x00"
register "eventb_enable" = "0x00"
register "eventc_enable" = "0xff"
register "eventd_enable" = "0xff"
register "evente_enable" = "0x0d"
end
end # LPC Controller
device pci 1f.2 on
subsystemid 0x17aa 0x21fb
end # 6 port SATA AHCI Controller
device pci 1f.3 on
subsystemid 0x17aa 0x21fb
# eeprom, 8 virtual devices, same chip
chip drivers/i2c/at24rf08c
device i2c 54 on end
device i2c 55 on end
device i2c 56 on end
device i2c 57 on end
device i2c 5c on end
device i2c 5d on end
device i2c 5e on end
device i2c 5f on end
end
end # SMBus Controller
device pci 1f.5 off end # SATA Controller 2
device pci 1f.6 on
subsystemid 0x17aa 0x21fb
end # Thermal
end
end
end
|
