1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
|
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2011 Advanced Micro Devices, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include "agesawrapper.h"
#include "amdlib.h"
#include "BiosCallOuts.h"
#include "heapManager.h"
#include <northbridge/amd/agesa/family14/dimmSpd.h>
/* Should AGESA_GNB_PCIE_SLOT_RESET use agesa_NoopSuccess?
*
* COM Express doesn't provide dedicated resets for individual lanes
* and it's not needed for the on-board Intel I210 GbE controller.
*/
STATIC BIOS_CALLOUT_STRUCT BiosCallouts[] =
{
{AGESA_ALLOCATE_BUFFER, BiosAllocateBuffer },
{AGESA_DEALLOCATE_BUFFER, BiosDeallocateBuffer },
{AGESA_LOCATE_BUFFER, BiosLocateBuffer },
{AGESA_DO_RESET, agesa_Reset },
{AGESA_READ_SPD, BiosReadSpd },
{AGESA_READ_SPD_RECOVERY, agesa_NoopUnsupported },
{AGESA_RUNFUNC_ONAP, agesa_RunFuncOnAp },
{AGESA_GNB_PCIE_SLOT_RESET, agesa_NoopUnsupported },
{AGESA_HOOKBEFORE_DRAM_INIT, BiosHookBeforeDramInit},
{AGESA_HOOKBEFORE_DRAM_INIT_RECOVERY, agesa_NoopSuccess },
{AGESA_HOOKBEFORE_DQS_TRAINING, agesa_NoopSuccess },
{AGESA_HOOKBEFORE_EXIT_SELF_REF, agesa_NoopSuccess },
};
AGESA_STATUS GetBiosCallout (UINT32 Func, UINT32 Data, VOID *ConfigPtr)
{
UINTN i;
AGESA_STATUS CalloutStatus;
UINTN CallOutCount = sizeof (BiosCallouts) / sizeof (BiosCallouts [0]);
/*
* printk(BIOS_SPEW,"%s function: %x\n", __func__, (u32) Func);
*/
CalloutStatus = AGESA_UNSUPPORTED;
for (i = 0; i < CallOutCount; i++) {
if (BiosCallouts[i].CalloutName == Func) {
CalloutStatus = BiosCallouts[i].CalloutPtr (Func, Data, ConfigPtr);
return CalloutStatus;
}
}
return CalloutStatus;
}
/* Call the host environment interface to provide a user hook opportunity. */
AGESA_STATUS BiosHookBeforeDramInit (UINT32 Func, UINT32 Data, VOID *ConfigPtr)
{
MEM_DATA_STRUCT *MemData = ConfigPtr;
printk(BIOS_INFO, "Setting DDR3 voltage: ");
FCH_IOMUX(65) = 1; // GPIO65: VMEM_LV_EN# lowers VMEM from 1.5 to 1.35V
switch (MemData->ParameterListPtr->DDR3Voltage) {
case VOLT1_25: // board is not able to provide this
MemData->ParameterListPtr->DDR3Voltage = VOLT1_35; // sorry
printk(BIOS_INFO, "can't provide 1.25 V, using ");
// fall through
default: // AGESA.h says in mixed case 1.5V DIMMs get excluded
case VOLT1_35:
FCH_GPIO(65) = 0x08; // = output, disable PU, set to 0
printk(BIOS_INFO, "1.35 V\n");
break;
case VOLT1_5:
FCH_GPIO(65) = 0xC8; // = output, disable PU, set to 1
printk(BIOS_INFO, "1.5 V\n");
}
return AGESA_SUCCESS;
}
|