blob: e6042f16047d37fe56a4d6d72e783ab9f30e7e39 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
|
uses CONFIG_SANDPOINT_ALTIMUS
uses CONFIG_CBFS
uses CONFIG_SANDPOINT_TALUS
uses CONFIG_SANDPOINT_UNITY
uses CONFIG_SANDPOINT_VALIS
uses CONFIG_SANDPOINT_GYRUS
uses ISA_IO_BASE
uses ISA_MEM_BASE
uses PCIC0_CFGADDR
uses PCIC0_CFGDATA
uses PNP_CFGADDR
uses PNP_CFGDATA
uses _IO_BASE
uses CROSS_COMPILE
uses HAVE_OPTION_TABLE
uses CONFIG_SANDPOINT_ALTIMUS
uses CONFIG_COMPRESS
uses DEFAULT_CONSOLE_LOGLEVEL
uses CONFIG_USE_INIT
uses CONFIG_CHIP_CONFIGURE
uses NO_POST
uses CONFIG_CONSOLE_SERIAL8250
uses TTYS0_BASE
uses CONFIG_IDE
uses CONFIG_FS_PAYLOAD
uses CONFIG_FS_EXT2
uses CONFIG_FS_ISO9660
uses CONFIG_FS_FAT
uses AUTOBOOT_CMDLINE
uses PAYLOAD_SIZE
uses ROM_SIZE
uses ROM_IMAGE_SIZE
uses _RESET
uses _EXCEPTION_VECTORS
uses _ROMBASE
uses _ROMSTART
uses _RAMBASE
uses _RAMSTART
uses STACK_SIZE
uses HEAP_SIZE
uses MAINBOARD
uses MAINBOARD_VENDOR
uses MAINBOARD_PART_NUMBER
uses COREBOOT_EXTRA_VERSION
uses CROSS_COMPILE
uses CC
uses HOSTCC
uses OBJCOPY
##
## Set memory map
##
default ISA_IO_BASE=0xfe000000
default ISA_MEM_BASE=0xfd000000
default PCIC0_CFGADDR=0xfec00000
default PCIC0_CFGDATA=0xfee00000
default PNP_CFGADDR=0x15c
default PNP_CFGDATA=0x15d
default _IO_BASE=ISA_IO_BASE
##
## The default compiler
##
default CC="$(CROSS_COMPILE)gcc"
default HOSTCC="gcc"
## use a cross compiler
#default CROSS_COMPILE="powerpc-eabi-"
#default CROSS_COMPILE="ppc_74xx-"
## Use stage 1 initialization code
default CONFIG_USE_INIT=1
## Use static configuration
default CONFIG_CHIP_CONFIGURE=1
## We don't use compressed image
default CONFIG_COMPRESS=0
## Turn off POST codes
default NO_POST=1
## Enable serial console
default DEFAULT_CONSOLE_LOGLEVEL=8
default CONFIG_CONSOLE_SERIAL8250=1
default TTYS0_BASE=0x3f8
## Load payload using filo
default CONFIG_IDE=1
default CONFIG_FS_PAYLOAD=1
default CONFIG_FS_EXT2=1
default CONFIG_FS_ISO9660=1
default CONFIG_FS_FAT=1
default AUTOBOOT_CMDLINE="hdc1:/vmlinuz"
# coreboot must fit into 128KB
default ROM_IMAGE_SIZE=131072
default ROM_SIZE={ROM_IMAGE_SIZE+PAYLOAD_SIZE}
default PAYLOAD_SIZE=262144
# Set stack and heap sizes (stage 2)
default STACK_SIZE=0x10000
default HEAP_SIZE=0x10000
# Sandpoint Demo Board
## Base of ROM
default _ROMBASE=0xfff00000
## Sandpoint reset vector
default _RESET=_ROMBASE+0x100
## Exception vectors (other than reset vector)
default _EXCEPTION_VECTORS=_RESET+0x100
## Start of coreboot in the boot rom
## = _RESET + exeception vector table size
default _ROMSTART=_RESET+0x3100
## Coreboot C code runs at this location in RAM
default _RAMBASE=0x00100000
default _RAMSTART=0x00100000
default CONFIG_SANDPOINT_ALTIMUS=1
### End Options.lb
#
# CBFS
#
#
default CONFIG_CBFS=0
end
|