summaryrefslogtreecommitdiff
path: root/src/mainboard/samsung/lumpy/devicetree.cb
blob: feae5bf1e8788983e85c0828fccb479dfdfe66a9 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
chip northbridge/intel/sandybridge
	# IGD Displays
	register "gfx.ndid" = "3"
	register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"

	# Enable DisplayPort Hotplug with 6ms pulse
	register "gpu_dp_d_hotplug" = "0x06"

	# Enable Panel as LVDS and configure power delays
	register "gpu_panel_port_select" = "0"			# LVDS
	register "gpu_panel_power_cycle_delay" = "5"		# T4: 400ms
	register "gpu_panel_power_up_delay" = "400"		# T1+T2: 40ms
	register "gpu_panel_power_down_delay" = "150"		# T3: 15ms
	register "gpu_panel_power_backlight_on_delay" = "2100"	# T5: 210ms
	register "gpu_panel_power_backlight_off_delay" = "2100"	# TD: 210ms

	# Set backlight PWM values
	register "gpu_cpu_backlight" = "0x000001e8"
	register "gpu_pch_backlight" = "0x03d00000"

	register "max_mem_clock_mhz" = "666"

	device cpu_cluster 0 on
		chip cpu/intel/model_206ax
			# Magic APIC ID to locate this chip
			device lapic 0x0 on end
			device lapic 0xacac off end

			register "c1_acpower" = "1"	# ACPI(C1) = MWAIT(C1)
			register "c2_acpower" = "3"	# ACPI(C2) = MWAIT(C3)
			register "c3_acpower" = "5"	# ACPI(C3) = MWAIT(C7)

			register "c1_battery" = "1"	# ACPI(C1) = MWAIT(C1)
			register "c2_battery" = "3"	# ACPI(C2) = MWAIT(C3)
			register "c3_battery" = "5"	# ACPI(C3) = MWAIT(C7)
		end
	end

	register "pci_mmio_size" = "1024"

	device domain 0 on
		ioapic_irq 4 INTA 0x10
		ioapic_irq 4 INTB 0x11
		ioapic_irq 4 INTC 0x12
		ioapic_irq 4 INTD 0x13
		subsystemid 0x1ae0 0xc000 inherit
		device pci 00.0 on end # host bridge
		device pci 02.0 on end # vga controller

		chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
			# GPI routing
			#  0 No effect (default)
			#  1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set)
			#  2 SCI (if corresponding GPIO_EN bit is also set)
			register "alt_gp_smi_en" = "0x0002"
			register "gpi1_routing" = "1"
			register "gpi7_routing" = "2"

			register "sata_port_map" = "0x1"

			# EC range is 0xa00-0xa3f
			register "gen1_dec" = "0x003c0a01"
			register "gen2_dec" = "0x003c0b01"
			register "gen3_dec" = "0x00fc1601"

			register "c2_latency" = "1"
			register "p_cnt_throttling_supported" = "0"

			device pci 16.0 on end # Management Engine Interface 1
			device pci 16.1 off end # Management Engine Interface 2
			device pci 16.2 off end # Management Engine IDE-R
			device pci 16.3 off end # Management Engine KT
			device pci 19.0 off end # Intel Gigabit Ethernet
			device pci 1a.0 on # USB2 EHCI #2
				ioapic_irq 4 INTA 0x11
			end
			device pci 1b.0 on # High Definition Audio
				ioapic_irq 4 INTA 0x16
			end
			device pci 1c.0 on end # PCIe Port #1 (WLAN)
			device pci 1c.1 off end # PCIe Port #2
			device pci 1c.2 off end # PCIe Port #3
			device pci 1c.3 on # PCIe Port #4 (LAN)
			#	ioapic_irq 4 INTA 0x13
			end
			device pci 1c.4 off end # PCIe Port #5
			device pci 1c.5 off end # PCIe Port #6
			device pci 1c.6 off end # PCIe Port #7
			device pci 1c.7 off end # PCIe Port #8
			device pci 1d.0 on # USB2 EHCI #1
				ioapic_irq 4 INTA 0x13
			end
			device pci 1e.0 off end # PCI bridge
			device pci 1f.0 on # LPC bridge
				ioapic_irq 4 INTA 0x10
				chip superio/smsc/mec1308
					device pnp 2e.1 on		# PM1
						io 0x60 = 0xb00
					end
					device pnp 2e.2 off end		# EC1
					device pnp 2e.3 off end		# EC2
					device pnp 2e.4 off end		# UART
					device pnp 2e.7 on		# KBC
						irq 0x70 = 1
					end
					device pnp 2e.8 on		# EC0
						io 0x60 = 0x62
					end
					device pnp 2e.9 on		# MBX
						io 0x60 = 0xa00
					end
				end
				chip ec/smsc/mec1308
					register "mailbox_port" = "0xa00"
					device pnp ff.1 off end
				end

				chip drivers/generic/ioapic
				     register "have_isa_interrupts" = "1"
				     register "irq_on_fsb" = "1"
				     register "enable_virtual_wire" = "1"
				     register "base" = "(void *)0xfec00000"
				     device ioapic 4 on end
				end
				chip drivers/pc80/tpm
					device pnp 0c31.0 on end
				end
			end
			device pci 1f.2 on # SATA Controller 1
				ioapic_irq 4 INTA 0x10
			end
			device pci 1f.3 on # SMBus
				ioapic_irq 4 INTC 0x17
			end
			device pci 1f.5 off end # SATA Controller 2
			device pci 1f.6 on end # Thermal
		end
	end
end