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#
# This file is part of the coreboot project.
#
# Copyright (C) 2011 - 2012 Advanced Micro Devices, Inc.
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; version 2 of the License.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
#

if BOARD_SUPERMICRO_H8QGI

config BOARD_SPECIFIC_OPTIONS
	def_bool y
	select ARCH_X86
	select CPU_AMD_AGESA_FAMILY15
	select CPU_AMD_SOCKET_G34
	select NORTHBRIDGE_AMD_AGESA_FAMILY15_ROOT_COMPLEX
	select NORTHBRIDGE_AMD_AGESA_FAMILY15
	select NORTHBRIDGE_AMD_CIMX_RD890
	select SOUTHBRIDGE_AMD_CIMX_SB700
	select SUPERIO_WINBOND_W83627DHG
	select SUPERIO_NUVOTON_WPCM450
	select DRIVERS_I2C_W83795
	select UDELAY_TSC
	select BOARD_HAS_FADT
	select HAVE_OPTION_TABLE
	select HAVE_PIRQ_TABLE
	select HAVE_MP_TABLE
	select HAVE_HARD_RESET
	select SERIAL_CPU_INIT
	select HAVE_ACPI_TABLES
	select BOARD_ROMSIZE_KB_2048
	#select MMCONF_SUPPORT_DEFAULT #TODO enable it to resolve Multicore IO conflict

config MAINBOARD_DIR
	string
	default supermicro/h8qgi

config MAINBOARD_PART_NUMBER
	string
	default "H8QGI"

config HW_MEM_HOLE_SIZEK
	hex
	default 0x200000

config MAX_CPUS
	int
	default 64

config MAX_PHYSICAL_CPUS
	int
	default 16

config HW_MEM_HOLE_SIZE_AUTO_INC
	bool
	default n

config MEM_TRAIN_SEQ
	int
	default 2

config IRQ_SLOT_COUNT
	int
	default 11

config RAMTOP
	hex
	default 0x1000000

config HEAP_SIZE
	hex
	default 0xc0000

config STACK_SIZE
	hex
	default 0x10000

config RAMBASE
	hex
	default 0x200000

config SIO_PORT
	hex
	default 0x164E
	help
		though UARTs are on the NUVOTON BMC, port 0x164E
		PS2 keyboard and mouse are on SUPERIO_WINBOND_W83627DHG, port 0x2E

config DRIVERS_PS2_KEYBOARD
	bool
	default y

config WARNINGS_ARE_ERRORS
	bool
	default n

config ONBOARD_VGA_IS_PRIMARY
	bool
	default y

config VGA_BIOS
	bool
	default n

config VGA_BIOS_ID
	string
	depends on VGA_BIOS
	default "102b,0532"

endif # BOARD_SUPERMICRO_H8QGI