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##
## This file is part of the coreboot project.
##
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
## GNU General Public License for more details.
##

# -----------------------------------------------------------------
entries

# -----------------------------------------------------------------
# Status Register A
# -----------------------------------------------------------------
# Status Register B
# -----------------------------------------------------------------
# Status Register C
#96           4       r       0        status_c_rsvd
#100          1       r       0        uf_flag
#101          1       r       0        af_flag
#102          1       r       0        pf_flag
#103          1       r       0        irqf_flag
# -----------------------------------------------------------------
# Status Register D
#104          7       r       0        status_d_rsvd
#111          1       r       0        valid_cmos_ram
# -----------------------------------------------------------------
# Diagnostic Status Register
#112          8       r       0        diag_rsvd1

# -----------------------------------------------------------------
0            120     r       0        reserved_memory
#120          264     r       0        unused

# -----------------------------------------------------------------
# RTC_BOOT_BYTE (coreboot hardcoded)
384          1       e       3        boot_option
388          4       h       0        reboot_counter

# -----------------------------------------------------------------
# coreboot config options: console
#392          3       r       0        unused
395          4       e       4        debug_level
#399          1       r       0        unused

#400         8       r       0        reserved for century byte

# coreboot config options: southbridge
408          1       e       1        nmi
409          2       e       5        power_on_after_fail

# coreboot config options: mainboard
416          1       e       1        hide_ast2400

# coreboot config options: check sums
984          16      h       0        check_sum

# -----------------------------------------------------------------

enumerations

#ID value   text
1     0     Disable
1     1     Enable

2     0     Enable
2     1     Disable

3     0     Fallback
3     1     Normal

4     0     Emergency
4     1     Alert
4     2     Critical
4     3     Error
4     4     Warning
4     5     Notice
4     6     Info
4     7     Debug
4     8     Spew

5     0     Disable
5     1     Enable
5     2     Keep

# -----------------------------------------------------------------
checksums

checksum 392 423 984