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path: root/src/mainboard/tyan/s2895/devicetree.cb
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chip northbridge/amd/amdk8/root_complex		# Root complex
  device lapic_cluster 0 on			# (L)APIC cluster
    chip cpu/amd/socket_940			# CPU socket
      device lapic 0 on end			# Local APIC of the CPU
    end
  end
  device pci_domain 0 on			# PCI domain
    subsystemid 0x10f1 0x2895 inherit
    chip northbridge/amd/amdk8			# Northbridge / RAM controller
      device pci 18.0 on			# Link 0 == LDT 0
        chip southbridge/nvidia/ck804		# Southbridge
          device pci 0.0 on end			# HT
          device pci 1.0 on			# LPC
            chip superio/smsc/lpc47b397		# Super I/O
              device pnp 2e.0 on		# Floppy
                io 0x60 = 0x3f0
                irq 0x70 = 6
                drq 0x74 = 2
              end
              device pnp 2e.3 on		# Parallel port
                io 0x60 = 0x378
                irq 0x70 = 7
                drq 0x74 = 4
              end
              device pnp 2e.4 on		# Com1
                io 0x60 = 0x3f8
                irq 0x70 = 4
              end
              device pnp 2e.5 off		# Com2
                io 0x60 = 0x2f8
                irq 0x70 = 3
              end
              device pnp 2e.7 on		# PS/2 keyboard & mouse
                io 0x60 = 0x60
                io 0x62 = 0x64
                irq 0x70 = 1
                irq 0x72 = 12
              end
              device pnp 2e.8 on		# Hardware monitor
                io 0x60 = 0x480
                chip drivers/generic/generic	# LM95221 CPU temp
                  device i2c 2b on end
                end
                chip drivers/generic/generic	# EMCT03
                  device i2c 54 on end
                end
              end
              device pnp 2e.a on		# RT
                io 0x60 = 0x400
              end
            end
          end
          device pci 1.1 on			# SM 0
            chip drivers/generic/generic	# DIMM 0-0-0
              device i2c 50 on end
            end
            chip drivers/generic/generic	# DIMM 0-0-1
              device i2c 51 on end
            end
            chip drivers/generic/generic	# DIMM 0-1-0
              device i2c 52 on end
            end
            chip drivers/generic/generic	# DIMM 0-1-1
              device i2c 53 on end
            end
            chip drivers/generic/generic	# DIMM 1-0-0
              device i2c 54 on end
            end
            chip drivers/generic/generic	# DIMM 1-0-1
              device i2c 55 on end
            end
            chip drivers/generic/generic	# DIMM 1-1-0
              device i2c 56 on end
            end
            chip drivers/generic/generic	# DIMM 1-1-1
              device i2c 57 on end
            end
          end
          device pci 1.1 on			# SM 1
            chip drivers/generic/generic	# MAC EEPROM
              device i2c 51 on end
            end
          end
          device pci 2.0 on end			# USB 1.1
          device pci 2.1 on end			# USB 2
          device pci 4.0 on end			# ACI
          device pci 4.1 off end		# MCI
          device pci 6.0 on end			# IDE
          device pci 7.0 on end			# SATA 1
          device pci 8.0 on end			# SATA 0
          device pci 9.0 on end			# PCI
          device pci a.0 on end			# NIC
          device pci b.0 off end		# PCI E 3
          device pci c.0 off end		# PCI E 2
          device pci d.0 off end		# PCI E 1
          device pci e.0 on end			# PCI E 0
          register "ide0_enable" = "1"
          register "ide1_enable" = "1"
          register "sata0_enable" = "1"
          register "sata1_enable" = "1"
          # 1: SMBus under 2e.8, 2: SM0 3: SM1
          register "mac_eeprom_smbus" = "3"
          register "mac_eeprom_addr" = "0x51"
        end
      end
      device pci 18.0 on end			# Link 1
      device pci 18.0 on			# Link 2 == LDT 2
        chip southbridge/amd/amd8131		# Southbridge
          device pci 0.0 on end
          device pci 0.1 on end
          device pci 1.0 on
            device pci 6.0 on end		# LSI SCSI
            device pci 6.1 on end
          end
          device pci 1.1 on end
        end
      end
      device pci 18.1 on end
      device pci 18.2 on end
      device pci 18.3 on end
    end
    chip northbridge/amd/amdk8			# Northbridge / RAM controller
      device pci 19.0 on			# Link 0 == LDT 0
        chip southbridge/nvidia/ck804		# Southbridge
          device pci 0.0 on end			# HT
          device pci 1.0 on end			# LPC
          device pci 1.1 off end		# SM
          device pci 2.0 off end		# USB 1.1
          device pci 2.1 off end		# USB 2
          device pci 4.0 off end		# ACI
          device pci 4.1 off end		# MCI
          device pci 6.0 off end		# IDE
          device pci 7.0 off end		# SATA 1
          device pci 8.0 off end		# SATA 0
          device pci 9.0 off end		# PCI
          device pci a.0 on end			# NIC
          device pci b.0 off end		# PCI E 3
          device pci c.0 off end		# PCI E 2
          device pci d.0 off end		# PCI E 1
          device pci e.0 on end			# PCI E 0
          # 1: SMBus under 2e.8, 2: SM0 3: SM1
          register "mac_eeprom_smbus" = "3"
          register "mac_eeprom_addr" = "0x51"
        end
      end
      device pci 19.0 on end
      device pci 19.0 on end
      device pci 19.1 on end
      device pci 19.2 on end
      device pci 19.3 on end
    end
  end
  # chip drivers/generic/debug
  #   device pnp 0.0 off end			# chip name
  #   device pnp 0.1 off end			# pci_regs_all
  #   device pnp 0.2 off end			# mem
  #   device pnp 0.3 off end			# cpuid
  #   device pnp 0.4 on  end			# smbus_regs_all
  #   device pnp 0.5 off end			# dual core msr
  #   device pnp 0.6 off end			# cache size
  #   device pnp 0.7 off end			# tsc
  # end
end